Inventor
KOCH GERRIT
DE25 patents
⚠️ This page may combine multiple inventors who share the name “KOCH GERRIT”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
24 patentsUS9245110B2Jan 26, 2016
Stack entry overwrite protection
IBM7 citations81
US9934343B2Apr 3, 2018
System and method for generation of an integrated circuit design
IBM3 citations71
US10635555B2Apr 28, 2020
Verifying a graph-based coherency verification tool
IBM4 citations70
US10282265B2May 7, 2019
Verifying a graph-based coherency verification tool
IBM4 citations70
US10318406B2Jun 11, 2019
Determine soft error resilience while verifying architectural compliance
IBM4 citations69
US8977823B2Mar 10, 2015
Store buffer for transactional memory
IBM2 citations63
US11099919B2Aug 24, 2021
Testing a data coherency algorithm
IBM0 citations62
US9959155B2May 1, 2018
Testing a data coherency algorithm
IBM1 citations62
US9928127B2Mar 27, 2018
Testing a data coherency algorithm
IBM1 citations62
US11099851B2Aug 24, 2021
Branch prediction for indirect branch instructions
IBM1 citations60
US10684857B2Jun 16, 2020
Data prefetching that stores memory addresses in a first table and responsive to the occurrence of loads corresponding to the memory addresses stores the memory addresses in a second table
IBM1 citations60
US10896118B2Jan 19, 2021
Determine soft error resilience while verifying architectural compliance
IBM0 citations59
US9921906B2Mar 20, 2018
Performing a repair operation in arrays
IBM0 citations52
US9916195B2Mar 13, 2018
Performing a repair operation in arrays
IBM0 citations52
US10678974B2Jun 9, 2020
System and method for generation of an integrated circuit design
IBM0 citations51
US10572617B2Feb 25, 2020
System and method for generation of an integrated circuit design
IBM0 citations51
US10558510B2Feb 11, 2020
Testing a data coherency algorithm
IBM0 citations51
US9928321B2Mar 27, 2018
System and method for generation of an integrated circuit design
IBM0 citations51
US12561252B2Feb 24, 2026
Dynamic cache loading and verification
IBM0 citations50
US9262626B2Feb 16, 2016
Stack entry overwrite protection
IBM0 citations49
US10830818B2Nov 10, 2020
Ensuring completeness of interface signal checking in functional verification
IBM0 citations48
US10823782B2Nov 3, 2020
Ensuring completeness of interface signal checking in functional verification
IBM0 citations48
US10489296B2Nov 26, 2019
Quality of cache management in a computer
IBM0 citations40
US9026968B2May 5, 2015
Verification assistance for digital circuit designs
IBM0 citations33