Inventor
YAMANAKA HIDEKAZU
JP11 patents
⚠️ This page may combine multiple inventors who share the name “YAMANAKA HIDEKAZU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SHARP KK
9 patentsUS6819140B2Nov 16, 2004
Self-synchronous logic circuit having test function and method of testing self-synchronous logic circuit
SHARP KK71 citations95
US5860130AJan 12, 1999
Memory interface apparatus including an address modification unit having an offset table for prestoring a plurality of offsets
SHARP KK8 citations72
US11367380B2Jun 21, 2022
Display device using binary driver having several holding circuits
SHARP KK0 citations62
US10706803B2Jul 7, 2020
Shift register circuit
SHARP KK1 citations62
US11036106B2Jun 15, 2021
Active matrix substrate and display device
SHARP KK0 citations51
US7463640B2Dec 9, 2008
Self-synchronous FIFO memory device
SHARP KK1 citations47
US10410597B2Sep 10, 2019
Shift register
SHARP KK0 citations41
US10347209B2Jul 9, 2019
Shift register
SHARP KK0 citations41
US10847109B2Nov 24, 2020
Active matrix substrate and display panel
SHARP KK0 citations40