Inventor
MOSALIKANTI PRAVEEN
US22 patents
⚠️ This page may combine multiple inventors who share the name “MOSALIKANTI PRAVEEN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
18 patentsUS10928886B2Feb 23, 2021
Frequency overshoot and voltage droop mitigation apparatus and method
INTEL CORP12 citations86
US10707877B1Jul 7, 2020
Method and apparatus for switched adaptive clocking
INTEL CORP14 citations85
US10790838B1Sep 29, 2020
Method and apparatus to perform dynamic frequency scaling while a phase-locked loop operates in a closed loop
INTEL CORP9 citations80
US11048284B2Jun 29, 2021
Self-referenced droop detector circuitry
INTEL CORP2 citations72
US10423182B2Sep 24, 2019
Self-referenced droop detector circuitry
INTEL CORP4 citations72
US9450589B2Sep 20, 2016
Clock generation system with dynamic distribution bypass mode
INTEL CORP4 citations70
US12306696B2May 20, 2025
Frequency overshoot and voltage droop mitigation apparatus and method
INTEL CORP0 citations62
US11847011B2Dec 19, 2023
Frequency overshoot and voltage droop mitigation apparatus and method
INTEL CORP0 citations62
US11211934B2Dec 28, 2021
Apparatus to improve lock time of a frequency locked loop
INTEL CORP0 citations62
US11188117B2Nov 30, 2021
Low latency analog adaptive clocking
INTEL CORP0 citations61
US8350610B2Jan 8, 2013
Method and apparatus for fast wake-up of analog biases
INTEL CORP2 citations58
US11461504B2Oct 4, 2022
Apparatus for autonomous security and functional safety of clock and voltages including adjustment of a divider ratio
INTEL CORP0 citations55
US7602663B2Oct 13, 2009
Fuse cell array with redundancy features
INTEL CORP0 citations52
US10790832B2Sep 29, 2020
Apparatus to improve lock time of a frequency locked loop
INTEL CORP0 citations51
US8031017B2Oct 4, 2011
Method and apparatus for determining within-die and across-die variation of analog circuits
INTEL CORP1 citations51
US9836078B2Dec 5, 2017
Clock generation system with dynamic distribution bypass mode
INTEL CORP0 citations49
US10824764B2Nov 3, 2020
Apparatus for autonomous security and functional safety of clock and voltages
INTEL CORP0 citations45
US10614774B2Apr 7, 2020
Device, method and system for on-chip generation of a reference clock signal
INTEL CORP0 citations38
MOSALIKANTI PRAVEEN
4 patentsUS8248124B2Aug 21, 2012
Methods and apparatuses for delay-locked loops and phase-locked loops
MOSALIKANTI PRAVEEN4 citations61
US8552781B2Oct 8, 2013
Digital quadrature phase correction
MOSALIKANTI PRAVEEN4 citations60
US8258837B2Sep 4, 2012
Controlled clock phase generation
MOSALIKANTI PRAVEEN4 citations60
US8502612B2Aug 6, 2013
Method and apparatus for determining within-die and across-die variation of analog circuits
MOSALIKANTI PRAVEEN1 citations50