Inventor

IDGUNJI SACHIN SATISH

US27 patents

⚠️ This page may combine multiple inventors who share the name “IDGUNJI SACHIN SATISH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IDGUNJI SACHIN SATISH

ADVANCED RISC MACH LTD

Virtual power rail modulation within an integrated circuit

Integrated circuit power-on control and programmable comparator

Controlling voltage levels applied to access devices when accessing storage cells in a memory

Power control circuitry, circuitry for analysing a switched power rail, and method of controlling connection of a power source to a switched power rail

Dynamically changing control of sequenced power gating

Sequential storage circuitry for an integrated circuit

Storage circuit with random number generation mode

NVIDIA CORP

Fault injection architecture for resilient GPU computing

Fault injection architecture for resilient GPU computing

Real-time hardware-assisted GPU tuning using machine learning

Optimal operating point estimator for hardware operating under a shared power/thermal constraint

Fault injection architecture for resilient GPU computing

Real-time hardware-assisted GPU tuning using machine learning

Real-time hardware-assisted GPU tuning using machine learning

IDGUNJI SACHIN SATISH

Sequential latching device with elements to increase hold times on the diagnostic data path

Voltage regulation of a virtual power rail

Improving read stability of a semiconductor memory

Leakage current reduction in an integrated circuit

Apparatus and method for detecting an approaching error condition

Characterising circuit cell performance variability in response to perturbations in manufacturing process parameters

CHANDRA VIKAS

Single event upset error detection within sequential storage circuitry of an integrated circuit

SANDHU BAL S

Data processing system and method for regulating a voltage supply to functional circuitry of the data processing system

FELTON DONALD

Apparatus and method for controlling refreshing of data in a DRAM

GAJJEWAR HEMANGI UMAKANT

Write assist in a dual write line semiconductor memory

MYERS JAMES EDWARD

Operating parameter monitoring circuit and method

FLYNN DAVID WALTER

Verifying state integrity in state retention circuits

ÖZER EMRE

Memory scrubbing