P

Inventor

FRIEDMAN BEN-ZION

IL58 patents
⚠️ This page may combine multiple inventors who share the name “FRIEDMAN BEN-ZION”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

43 patents
US9467512B2Oct 11, 2016

Techniques for remote client access to a storage medium coupled with a server

INTEL CORP15 citations92
US9467511B2Oct 11, 2016

Techniques for use of vendor defined messages to execute a command to access a storage device

INTEL CORP20 citations92
US10552207B2Feb 4, 2020

Systems and methods for multi-architecture computing including program stack translation

INTEL CORP11 citations86
US10944660B2Mar 9, 2021

Managing congestion in a network

INTEL CORP12 citations85
US10713213B2Jul 14, 2020

Systems and methods for multi-architecture computing

INTEL CORP10 citations84
US10684984B2Jun 16, 2020

Computing devices and server systems with processing cores having different instruction set architectures

INTEL CORP10 citations84
US11616723B2Mar 28, 2023

Techniques to reduce network congestion

INTEL CORP7 citations83
US9158703B2Oct 13, 2015

Linear to physical address translation with support for page attributes

INTEL CORP4 citations83
US11194735B2Dec 7, 2021

Technologies for flexible virtual function queue assignment

INTEL CORP2 citations73
US10341230B2Jul 2, 2019

Techniques for forwarding or receiving data segments associated with a large data packet

INTEL CORP2 citations73
US9973335B2May 15, 2018

Shared buffers for processing elements on a network device

INTEL CORP2 citations73
US9686190B2Jun 20, 2017

Techniques for forwarding or receiving data segments associated with a large data packet

INTEL CORP3 citations73
US9563431B2Feb 7, 2017

Techniques for cooperative execution between asymmetric processor cores

INTEL CORP4 citations73
US11621918B2Apr 4, 2023

Techniques to manage data transmissions

INTEL CORP5 citations72
US9608842B2Mar 28, 2017

Providing, at least in part, at least one indication that at least one portion of data is available for processing

INTEL CORP2 citations72
US12425340B2Sep 23, 2025

Single lookup entry for symmetric flows

INTEL CORP2 citations70
US11531752B2Dec 20, 2022

Technologies for control plane separation in a network interface controller

INTEL CORP3 citations68
US10275558B2Apr 30, 2019

Technologies for providing FPGA infrastructure-as-a-service computing capabilities

INTEL CORP4 citations65
US9164917B2Oct 20, 2015

Linear to physical address translation with support for page attributes

INTEL CORP2 citations63
US9164916B2Oct 20, 2015

Linear to physical address translation with support for page attributes

INTEL CORP2 citations63
US9030936B2May 12, 2015

Flow control with reduced buffer usage for network devices

INTEL CORP2 citations63
US7793071B2Sep 7, 2010

Method and system for reducing cache conflicts

INTEL CORP2 citations63
US12124403B2Oct 22, 2024

Systems and methods for multi-architecture computing

INTEL CORP0 citations62
US11875839B2Jan 16, 2024

Flow based rate limit

INTEL CORP0 citations62
US11575620B2Feb 7, 2023

Queue-to-port allocation

INTEL CORP0 citations62
US11494220B2Nov 8, 2022

Scalable techniques for data transfer between virtual machines

INTEL CORP0 citations62
US11275709B2Mar 15, 2022

Systems and methods for multi-architecture computing

INTEL CORP0 citations62
US11134125B2Sep 28, 2021

Active link during LAN interface reset

INTEL CORP0 citations62
US11074191B2Jul 27, 2021

Linear to physical address translation with support for page attributes

INTEL CORP0 citations62
US10884970B2Jan 5, 2021

Techniques for coalescing doorbells in a request message

INTEL CORP0 citations62
US8996755B2Mar 31, 2015

Facilitating, at least in part, by circuitry, accessing of at least one controller command interface

INTEL CORP1 citations62
US12212504B2Jan 28, 2025

Techniques to use descriptors for packet transmit scheduling

INTEL CORP0 citations61
US11138143B2Oct 5, 2021

Techniques for command validation for access to a storage device by a remote client

INTEL CORP0 citations61
US10951475B2Mar 16, 2021

Technologies for transmit scheduler dynamic configurations

INTEL CORP0 citations61
US11159427B2Oct 26, 2021

Single lookup entry for symmetric flows

INTEL CORP0 citations58
US10812402B2Oct 20, 2020

Shaping of post-scheduling network pipeline jitter

INTEL CORP1 citations58
US10782978B2Sep 22, 2020

Techniques for cooperative execution between asymmetric processor cores

INTEL CORP0 citations52
US10628192B2Apr 21, 2020

Scalable techniques for data transfer between virtual machines

INTEL CORP0 citations52
US10346175B2Jul 9, 2019

Techniques for cooperative execution between asymmetric processor cores

INTEL CORP0 citations52
US9992299B2Jun 5, 2018

Technologies for network packet cache management

INTEL CORP0 citations51
US9866498B2Jan 9, 2018

Technologies for network packet cache management

INTEL CORP0 citations51
US9577791B2Feb 21, 2017

Notification by network element of packet drops

INTEL CORP0 citations51
US9244881B2Jan 26, 2016

Facilitating, at least in part, by circuitry, accessing of at least one controller command interface

INTEL CORP0 citations51

TAMIR ELIEZER

2 patents

TAHOE RES LTD

2 patents

UNM RAINFOREST INNOVATIONS

1 patent

FALIK OHAD

1 patent

FRIEDMAN BEN-ZION

1 patent

Showing the top 50 of 58 patents by PatentIndex Score.