Inventor
GASBARRO JAMES A
US40 patents
⚠️ This page may combine multiple inventors who share the name “GASBARRO JAMES A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
RAMBUS INC
29 patentsUS6401167B1Jun 4, 2002
High performance cost optimized memory
RAMBUS INC168 citations99
US6266730B1Jul 24, 2001
High-frequency bus system
RAMBUS INC137 citations99
US6075730AJun 13, 2000
High performance cost optimized memory with delayed memory writes
RAMBUS INC182 citations99
US6067594AMay 23, 2000
High frequency bus system
RAMBUS INC125 citations99
US5446696AAug 29, 1995
Method and apparatus for implementing refresh in a synchronous DRAM system
RAMBUS INC153 citations99
US5337285AAug 9, 1994
Method and apparatus for power control in devices
RAMBUS INC193 citations99
US5268639ADec 7, 1993
Testing timing parameters of high speed integrated circuit devices
RAMBUS INC151 citations99
US5254883AOct 19, 1993
Electrical current source circuitry for a bus
RAMBUS INC537 citations99
US6509756B1Jan 21, 2003
Method and apparatus for low capacitance, high output impedance driver
RAMBUS INC96 citations98
US5432823AJul 11, 1995
Method and circuitry for minimizing clock-data skew in a bus system
RAMBUS INC504 citations98
US6868474B2Mar 15, 2005
High performance cost optimized memory
RAMBUS INC58 citations97
US7287119B2Oct 23, 2007
Integrated circuit memory device with delayed write command processing
RAMBUS INC40 citations96
US7197611B2Mar 27, 2007
Integrated circuit memory device having write latency function
RAMBUS INC54 citations96
US6687780B1Feb 3, 2004
Expandable slave device system
RAMBUS INC47 citations96
US6009487ADec 28, 1999
Method and apparatus for setting a current of an output driver for the high speed bus
RAMBUS INC70 citations94
US7330952B2Feb 12, 2008
Integrated circuit memory device having delayed write timing based on read response time
RAMBUS INC10 citations93
US7330953B2Feb 12, 2008
Memory system having delayed write timing
RAMBUS INC11 citations93
US5357195AOct 18, 1994
Testing set up and hold input timing parameters of high speed integrated circuit devices
RAMBUS INC35 citations93
US5325053AJun 28, 1994
Apparatus for testing timing parameters of high speed integrated circuit devices
RAMBUS INC28 citations93
US6330193B1Dec 11, 2001
Method and apparatus for low capacitance, high output impedance driver
RAMBUS INC41 citations92
US6671836B1Dec 30, 2003
Method and apparatus for testing memory
RAMBUS INC49 citations90
US7496709B2Feb 24, 2009
Integrated circuit memory device having delayed write timing based on read response time
RAMBUS INC6 citations74
US7360050B2Apr 15, 2008
Integrated circuit memory device having delayed write capability
RAMBUS INC6 citations74
US7002367B2Feb 21, 2006
Method and apparatus for low capacitance, high output impedance driver
RAMBUS INC5 citations74
US7222209B2May 22, 2007
Expandable slave device system
RAMBUS INC6 citations73
USRE39153EJul 4, 2006
Connector with integral transmission line bus
RAMBUS INC6 citations70
US7793039B2Sep 7, 2010
Interface for a semiconductor memory device and method for controlling the interface
RAMBUS INC1 citations63
US7536494B2May 19, 2009
Expandable slave device system with buffered subsystems
RAMBUS INC4 citations62
US7199605B2Apr 3, 2007
Method and apparatus for low capacitance, high output impedance driver
RAMBUS INC0 citations52
SCIENTIA VASCULAR LLC
3 patentsUS9662798B2May 30, 2017
Micro-cutting systems for forming cuts in products
SCIENTIA VASCULAR LLC28 citations93
US10980968B2Apr 20, 2021
Micro-cutting systems for forming cuts in products
SCIENTIA VASCULAR LLC6 citations83
US10232141B2Mar 19, 2019
Micro-cutting systems for forming cuts in products
SCIENTIA VASCULAR LLC2 citations72