Inventor

ATHREYA MADHU S

US2 patents

Patents

2 patents

US7496801B2Feb 24, 2009

Method, apparatus and system for facilitating debug for link interconnects

INTEL CORP2 citations58

US9800781B2Oct 24, 2017

Method, apparatus, system, and computer readable medium for image processing software module configuration

INTEL CORP0 citations30