Inventor

PULUGURTHA SRINIVAS

US37 patents

⚠️ This page may combine multiple inventors who share the name “PULUGURTHA SRINIVAS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PULUGURTHA SRINIVAS

MICRON TECHNOLOGY INC

Vertical access devices, semiconductor device structures, and related methods

Underbody contact to horizontal access devices for vertical three-dimensional (3D) memory

Memory device having 2-transistor vertical memory cell

Apparatuses having memory cells with two transistors and one capacitor, and having body regions of the transistors coupled with reference voltages

Memory devices including memory cells and related methods

Apparatuses having memory cells with two transistors and one capacitor, and having body regions of the transistors coupled with reference voltages

Passing access line structure in a memory device

Vertical access device and apparatuses having a body connection line, and related method of operating the same

Vertical 2-transistor memory cell

Integrated assemblies having conductive material along three of four sides around active regions, and methods of forming integrated assemblies

Memory device having 2-transistor vertical memory cell

Metal insulator semiconductor (MIS) contact in three dimensional (3D) vertical memory

Integrated assemblies

Passing access line structure in a memory device

Integrated assemblies having shield lines between digit lines, and methods of forming integrated assemblies

Memory arrays, and methods of forming memory arrays

Apparatuses having a vertical memory cell

Memory device having 2-transistor vertical memory cell

Integrated assemblies

Memory device having 2-transistor vertical memory cell

Integrated assemblies and methods of forming integrated assemblies

Integrated assemblies having shield lines between digit lines, and methods of forming integrated assemblies

Integrated assemblies, and methods of forming integrated assemblies

Integrated assemblies and methods of forming integrated assemblies

Apparatuses having memory cells with two transistors and one capacitor, and having body regions of the transistors coupled with reference voltages

Apparatuses including memory cells and related methods

Memory arrays, and methods of forming memory arrays

Memory arrays, and methods of forming memory arrays

Memory arrays

Semiconductor devices including vertical memory cells and methods of forming same

Apparatus with doped surfaces, and related methods with in situ doping

Memory device including calibration operation and transistor having adjustable threshold voltage

Apparatuses including transistors, and related methods, memory devices, and electronic systems

Asymmetric source/drain regions of transistors

Recessed access devices and DRAM constructions

SANDISK TECHNOLOGIES LLC

Three-dimensional memory device with wiggled drain-select-level isolation structure and methods of manufacturing the same

Field effect transistors with gate fins and method of making the same