Inventor
MURRAY JOHN E
US15 patents
⚠️ This page may combine multiple inventors who share the name “MURRAY JOHN E”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
DIGITAL EQUIPMENT CORP
13 patentsUS4888679ADec 19, 1989
Method and apparatus using a cache and main memory for both vector processing and scalar processing by prefetching cache blocks including vector data elements
DIGITAL EQUIPMENT CORP151 citations99
US5142634AAug 25, 1992
Branch prediction
DIGITAL EQUIPMENT CORP276 citations97
US4985825AJan 15, 1991
System for delaying processing of memory access exceptions until the execution stage of an instruction pipeline of a virtual memory system based digital computer
DIGITAL EQUIPMENT CORP128 citations97
US5222223AJun 22, 1993
Method and apparatus for ordering and queueing multiple memory requests
DIGITAL EQUIPMENT CORP100 citations96
US5148528ASep 15, 1992
Method and apparatus for simultaneously decoding three operands in a variable length instruction when one of the operands is also of variable length
DIGITAL EQUIPMENT CORP59 citations96
US5125083AJun 23, 1992
Method and apparatus for resolving a variable number of potential memory access conflicts in a pipelined computer system
DIGITAL EQUIPMENT CORP91 citations96
US5142633AAug 25, 1992
Preprocessing implied specifiers in a pipelined processor
DIGITAL EQUIPMENT CORP57 citations95
US5113515AMay 12, 1992
Virtual instruction cache system using length responsive decoded instruction shifting and merging with prefetch buffer outputs to fill instruction buffer
DIGITAL EQUIPMENT CORP67 citations95
US5109495AApr 28, 1992
Method and apparatus using a source operand list and a source operand pointer queue between the execution unit and the instruction decoding and operand processing units of a pipelined data processor
DIGITAL EQUIPMENT CORP105 citations94
US4982402AJan 1, 1991
Method and apparatus for detecting and correcting errors in a pipelined computer system
DIGITAL EQUIPMENT CORP84 citations94
US5349651ASep 20, 1994
System for translation of virtual to physical addresses by operating memory management processor for calculating location of physical address in memory concurrently with cache comparing virtual addresses for translation
DIGITAL EQUIPMENT CORP51 citations92
US5167026ANov 24, 1992
Simultaneously or sequentially decoding multiple specifiers of a variable length pipeline instruction based on detection of modified value of specifier registers
DIGITAL EQUIPMENT CORP53 citations90
US5142631AAug 25, 1992
System for queuing individual read or write mask and generating respective composite mask for controlling access to general purpose register
DIGITAL EQUIPMENT CORP54 citations90