Inventor
MEIER PETER J
US12 patents
⚠️ This page may combine multiple inventors who share the name “MEIER PETER J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
HEWLETT PACKARD CO
4 patentsUS5467038ANov 14, 1995
Quick resolving latch
HEWLETT PACKARD CO161 citations97
US5581197ADec 3, 1996
Method of programming a desired source resistance for a driver stage
HEWLETT PACKARD CO135 citations95
US5847969ADec 8, 1998
Integrated circuit design system and method for generating a regular structure embedded in a standard cell control block
HEWLETT PACKARD CO31 citations92
US5646809AJul 8, 1997
High voltage tolerant CMOS input/output pad circuits
HEWLETT PACKARD CO39 citations90
AGILENT TECHNOLOGIES INC
4 patentsUS6744285B2Jun 1, 2004
Method and apparatus for synchronously transferring data across multiple clock domains
AGILENT TECHNOLOGIES INC51 citations86
US6539507B1Mar 25, 2003
Integrated circuit with alternately selectable state evaluation provisions
AGILENT TECHNOLOGIES INC14 citations78
US6124869ASep 26, 2000
Method and apparatus for low cost set mapping
AGILENT TECHNOLOGIES INC3 citations62
US6665218B2Dec 16, 2003
Self calibrating register for source synchronous clocking systems
AGILENT TECHNOLOGIES INC6 citations60
AVAGO TECHNOLOGIES GENERAL IP
3 patentsUS8902091B1Dec 2, 2014
System and method for high speed data parallelization for an N-phase receiver
AVAGO TECHNOLOGIES GENERAL IP3 citations59
US7526744B2Apr 28, 2009
Integrated circuit design method for efficiently generating mask data
AVAGO TECHNOLOGIES GENERAL IP1 citations45
US9767062B2Sep 19, 2017
Low power parallelization to multiple output bus widths
AVAGO TECHNOLOGIES GENERAL IP0 citations39