Inventor

HADDAD SAMEER S

US58 patents

⚠️ This page may combine multiple inventors who share the name “HADDAD SAMEER S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HADDAD SAMEER S

ADVANCED MICRO DEVICES INC

Method of programming a non-volatile memory cell using a current limiter

Multiple bits per-cell flash EEPROM capable of concurrently programming and verifying memory cells and reference cells

Automatic program disturb with intelligent soft programming for flash cells

Flash EEPROM memory with improved discharge speed using substrate bias and method therefor

Method for bulk (or byte) charging and discharging an array of flash EEPROM memory cells

Flash EEPROM array with high endurance

Flash EEPROM array with negative gate voltage erase operation

Method of improving dynamic reference tracking for flash memory unit

Method of drain avalanche programming of a non-volatile memory cell

Threshold voltage compacting for non-volatile semiconductor memory designs

Method to reduce read gate disturb for flash EEPROM application

Method of improving silicon dioxide

Multiple byte channel hot electron programming using ramped gate and source bias voltage

System for programming a non-volatile memory cell

Nitridization of the pre-ddi screen oxide

Ramped gate technique for soft programming to tighten the Vt distribution

Three-dimensional non-volatile memory

Optimized biasing scheme for NAND read and hot-carrier write operations

Channel hot-carrier page write for NAND applications

Multiple bits-per-cell flash EEPROM memory cells with wide program and erase Vt window

Flash EEPROM memory with improved discharged speed using substrate bias and method therefor

Channel hot-carrier page write

Dual cell memory device having a top dielectric stack

Flash memory device having four-bit cells

Feedback method to optimize electric field during channel erase of flash memory devices

Ramped or stepped gate channel erase for flash memory application

Concurrent erase verify scheme for flash memory applications

Method for programming flash electrically erasable programmable read-only memory

Circuit implementation to quench bit line leakage current in programming and over-erase correction modes in flash EEPROM

Method for erasing flash electrically erasable programmable read-only memory (EEPROM)

Flash memory cell programming method and system

Memory device having a thin top dielectric and method of erasing same

Deposited screen oxide for reducing gate edge lifting

Flash memory device with increase of efficiency during an APDE (automatic program disturb after erase) process

Method for erasing flash electrically erasable programmable read-only memory (EEPROM)

Memory device with reduced operating voltage having dielectric stack

Charge gain/charge loss junction leakage prevention for flash technology by using double isolation/capping layer between lightly doped drain and gate

Capping layer

Accurate verify apparatus and method for NOR flash memory cells in the presence of high column leakage

Method for protecting gate edges from charge gain/loss in semiconductor device

Three-dimensional non-volatile memory

Method for inhibiting tunnel oxide growth at the edges of a floating gate during semiconductor device processing

Method for inhibiting tunnel oxide growth at the edges of a floating gate during semiconductor device processing

Charge gain/charge loss junction leakage prevention for flash technology by using double isolation/capping layer between lightly doped drain and gate

Capping layer

CYPRESS SEMICONDUCTOR CORP

Modified local segmented self-boosting of memory cell channels

Charge trapping split gate device and method of fabricating same

ADVANCE MICRO DEVICES INC

Method for reading a non-volatile memory cell

SPANSION LLC

Structure and method for protecting memory cells from UV radiation damage and UV radiation-induced charging during backend processing

SEMICONDUCTOR COMPONENTS IND LLC

Process of forming an electronic device including a non-volatile memory cell