Inventor

CHEAH KEN CHEONG

MY14 patents

⚠️ This page may combine multiple inventors who share the name “CHEAH KEN CHEONG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ADVANCED MICRO DEVICES INC

10 patents

US7010736B1Mar 7, 2006

Address sequencer within BIST (Built-in-Self-Test) system

ADVANCED MICRO DEVICES INC106 citations96

US6631086B1Oct 7, 2003

On-chip repair of defective address of core flash memory cells

ADVANCED MICRO DEVICES INC111 citations96

US6665214B1Dec 16, 2003

On-chip erase pulse counter for efficient erase verify BIST (built-in-self-test) mode

ADVANCED MICRO DEVICES INC58 citations95

US7028240B1Apr 11, 2006

Diagnostic mode for testing functionality of BIST (built-in-self-test) back-end state machine

ADVANCED MICRO DEVICES INC34 citations92

US6707718B1Mar 16, 2004

Generation of margining voltage on-chip during testing CAM portion of flash memory device

ADVANCED MICRO DEVICES INC40 citations90

US6891752B1May 10, 2005

System and method for erase voltage control during multiple sector erase of a flash memory device

ADVANCED MICRO DEVICES INC15 citations82

US6980473B1Dec 27, 2005

Memory device and method

ADVANCED MICRO DEVICES INC6 citations72

US6973003B1Dec 6, 2005

Memory device and method

ADVANCED MICRO DEVICES INC8 citations71

US6970368B1Nov 29, 2005

CAM (content addressable memory) cells as part of core array in flash memory device

ADVANCED MICRO DEVICES INC4 citations62

US6771093B1Aug 3, 2004

Implementing reference current measurement mode within reference array programming mode or reference array erase mode in a semiconductor

ADVANCED MICRO DEVICES INC0 citations51

SPANSION LLC

4 patents

US7672803B1Mar 2, 2010

CHEAH KEN CHEONG

ADVANCED MICRO DEVICES INC

Address sequencer within BIST (Built-in-Self-Test) system

On-chip repair of defective address of core flash memory cells

On-chip erase pulse counter for efficient erase verify BIST (built-in-self-test) mode

Diagnostic mode for testing functionality of BIST (built-in-self-test) back-end state machine

Generation of margining voltage on-chip during testing CAM portion of flash memory device

System and method for erase voltage control during multiple sector erase of a flash memory device

Memory device and method

Memory device and method

CAM (content addressable memory) cells as part of core array in flash memory device

Implementing reference current measurement mode within reference array programming mode or reference array erase mode in a semiconductor

SPANSION LLC

Input of test conditions and output generation for built-in self test

Page—EXE erase algorithm for flash memory

Automated tests for built-in self test

Flexible latency in flash memory