Inventor

CARLSON CHRIS M

US59 patents

⚠️ This page may combine multiple inventors who share the name “CARLSON CHRIS M”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CARLSON CHRIS M

MICRON TECHNOLOGY INC

Deposition methods

Memory device including voids between control gates

Methods of forming an array of elevationally-extending strings of memory cells having a stack comprising vertically-alternating insulative tiers and wordline tiers and horizontally-elongated trenches in the stack

Atomic layer deposition methods

Void formation in charge trap structures

Void formation for charge trap structures

Memory cells and integrated structures

Methods of forming capacitors

Charge trap structure with barrier to blocking region

Void formation in charge trap structures

Void formation for charge trap structures

Memory device including voids between control gates

Memory cells, integrated structures and memory arrays

Capacitors, dielectric structures, and methods of forming dielectric structures

Microelectronic devices with dopant extensions near a GIDL region below a tier stack, and related methods and systems

Atomic layer deposition methods

Methods of forming capacitors by ALD to prevent oxidation of the lower electrode

Void formation in charge trap structures

Methods of forming NAND memory arrays

Charge trap structure with barrier to blocking region

Memory device including voids between control gates

NAND memory arrays, and devices comprising semiconductor channel material and nitrogen

Memory cells and integrated structures

Electronic devices comprising adjoining oxide materials and related systems

Memory arrays and methods used in forming a memory array comprising strings of memory cells

Memory cells, integrated structures and memory arrays

Methods of forming material over a substrate and methods of forming capacitors

Methods of forming layers comprising epitaxial silicon

Capacitors comprising dielectric regions having first and second oxide material portions of the same chemical compositon but different densities

Methods of forming layers comprising epitaxial silicon

Deposition methods

Atomic layer deposition methods

Atomic layer deposition methods

Electronic devices comprising adjoining oxide materials and related systems

Microelectronic devices with source region vertical extension between upper and lower channel regions, and related methods

Void formation for charge trap structures

Microelectronic and semiconductor devices with a tunneling structure free of high-γ material by a select gate structure, and related methods

Memory device including voids between control gates

Charge trap structure with barrier to blocking region

Memory arrays and methods used in forming a memory array

Electronic apparatus with an oxide-only tunneling structure by a select gate tier, and related methods

Memory arrays and methods used in forming a memory array

Integrated structures having gallium-containing regions

Memory arrays and methods used in forming a memory array comprising strings of memory cells

Constructions comprising thermally conductive stacks containing rutile-type titanium oxide

Memory arrays and methods used in forming a memory array comprising strings of memory cells

Memory arrays and methods used in forming a memory array comprising strings of memory cells

RAMASWAMY NIRMAL

Methods of forming layers comprising epitaxial silicon

LODESTAR LICENSING GROUP LLC

Microelectronic devices with tunneling structures having partial-height high-κ material regions

ANTONOV VASSIL

Methods of forming capacitors