Inventor

HEMINK GERRIT JAN

JP131 patents

⚠️ This page may combine multiple inventors who share the name “HEMINK GERRIT JAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HEMINK GERRIT JAN

SANDISK CORP

Systems for soft programming non-volatile memory utilizing individual verification and additional soft programming of subsets of memory cells

Compensating for coupling in non-volatile storage

Faster programming of higher level states in multi-level cell flash memory

Self-boosting system for flash memory cells

Erase voltage manipulation in non-volatile memory for controlled shifts in threshold voltage

System for verifying non-volatile storage using different voltages

Verify operation for non-volatile storage using different voltages

Programming non-volatile memory with reduced program disturb by removing pre-charge dependency on word line data

Erasing non-volatile memory using individual verification and additional erasing of subsets of memory cells

Systems for erasing non-volatile memory using individual verification and additional erasing of subsets of memory cells

Method for programming non-volatile memory with reduced program disturb using modified pass voltages

Method of partial page fail bit detection in flash memory devices

High speed programming system with reduced over programming

Erasing non-volatile memory using individual verification and additional erasing of subsets of memory cells

Apparatus for reducing the impact of program disturb

Selective application of program inhibit schemes in non-volatile memory

Adaptive erase and soft programming for memory

Enhanced bit-line pre-charge scheme for increasing channel boosting in non-volatile storage

Faster programming of multi-level non-volatile storage through reduced verify operations

Faster programming of highest multi-level state for non-volatile memory

Systems for erase voltage manipulation in non-volatile memory for controlled shifts in threshold voltage

Reducing the impact of program disturb during read

Soft programming non-volatile memory utilizing individual verification and additional soft programming of subsets of memory cells

Self-boosting system for flash memory cells

Systems for programming non-volatile memory with reduced program disturb by removing pre-charge dependency on word line data

Systems for programming non-volatile memory with reduced program disturb by using different pre-charge enable voltages

Boosting for non-volatile storage using channel isolation switching

Programming non-volatile memory with reduced program disturb by using different pre-charge enable voltages

Selective program voltage ramp rates in non-volatile memory

Reducing the impact of program disturb

Apparatus for reducing the impact of program disturb during read

Partial page fail bit detection in flash memory devices

Apparatus for programming non-volatile memory with reduced program disturb using modified pass voltages

Active boosting to minimize capacitive coupling effect between adjacent gates of flash memory devices

Methods for active boosting to minimize capacitive coupling effect between adjacent gates of flash memory devices

SANDISK TECHNOLOGIES INC

Multi tier three-dimensional memory devices including vertically shared bit lines

Word line dependent programming in a memory device

Systems and methods for lower page writes

Programming non-volatile memory with high resolution variable initial programming pulse

Verification process for non-volatile storage

Ramping pass voltage to enhance channel boost in memory device

ALROD IDAN

Non-volatile memory and methods with reading soft bits in non uniform schemes

Non-volatile memory and methods with soft-bit reads while reading hard bits with compensation for coupling

SANDISK TECHNOLOGIES LLC

Multi-state and confined phase change memory with vertical cross-point structure

Cell current based bit line voltage

HEMINK GERRIT JAN

Non-volatile storage with temperature compensation based on neighbor state information

LAI CHUN-HUNG

Selected word line dependent select gate voltage during program

WESTERN DIGITAL TECH INC

Dual data protection in storage devices

DUTTA DEEPANSHU

Programming non-volatile memory with a reduced number of verify operations

DONG YINGDA

Selective memory cell program and erase