Inventor

CHELCEA TIBERIU

US2 patents

⚠️ This page may combine multiple inventors who share the name “CHELCEA TIBERIU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

UNIV COLUMBIA

1 patent

US6850092B2Feb 1, 2005

Low latency FIFO circuits for mixed asynchronous and synchronous systems

UNIV COLUMBIA57 citations92

CHELCEA TIBERIU

1 patent

US7197582B2Mar 27, 2007

Low latency FIFO circuit for mixed clock systems

CHELCEA TIBERIU20 citations85