Inventor
HU SHILIANG
US23 patents
⚠️ This page may combine multiple inventors who share the name “HU SHILIANG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
18 patentsUS9146844B2Sep 29, 2015
Apparatus, method, and system for providing a decision mechanism for conditional commits in an atomic region
INTEL CORP17 citations92
US9817644B2Nov 14, 2017
Apparatus, method, and system for providing a decision mechanism for conditional commits in an atomic region
INTEL CORP5 citations84
US9501135B2Nov 22, 2016
Dynamic core selection for heterogeneous multi-core systems
INTEL CORP6 citations84
US9317297B2Apr 19, 2016
Replay execution of instructions in thread chunks in the chunk order recorded during previous execution
INTEL CORP13 citations82
US9128781B2Sep 8, 2015
Processor with memory race recorder to record thread interleavings in multi-threaded software
INTEL CORP9 citations82
US10534424B2Jan 14, 2020
Dynamic core selection for heterogeneous multi-core systems
INTEL CORP1 citations73
US10437319B2Oct 8, 2019
Dynamic core selection for heterogeneous multi-core systems
INTEL CORP1 citations73
US10120781B2Nov 6, 2018
Techniques for detecting race conditions
INTEL CORP5 citations72
US9965320B2May 8, 2018
Processor with transactional capability and logging circuitry to report transactional operations
INTEL CORP3 citations72
US9875108B2Jan 23, 2018
Shared memory interleavings for instruction atomicity violations
INTEL CORP2 citations71
US11755099B2Sep 12, 2023
Dynamic core selection for heterogeneous multi-core systems
INTEL CORP0 citations62
US10437318B2Oct 8, 2019
Dynamic core selection for heterogeneous multi-core systems
INTEL CORP0 citations52
US10387296B2Aug 20, 2019
Methods and systems to identify and reproduce concurrency violations in multi-threaded programs using expressions
INTEL CORP0 citations51
US10474471B2Nov 12, 2019
Methods and systems for performing a replay execution
INTEL CORP0 citations50
US10394561B2Aug 27, 2019
Mechanism for facilitating dynamic and efficient management of instruction atomicity volations in software programs at computing systems
INTEL CORP0 citations48
US10007549B2Jun 26, 2018
Apparatus and method for a profiler for hardware transactional memory programs
INTEL CORP0 citations41
US9697040B2Jul 4, 2017
Software replayer for transactional memory programs
INTEL CORP0 citations41
US9342303B2May 17, 2016
Modified execution using context sensitive auxiliary code
INTEL CORP0 citations41