Inventor
FERNSLER MATTHEW EARL
US2 patents
Patents
2 patentsUS8073669B2Dec 6, 2011
Method and apparatus for detecting clock gating opportunities in a pipelined electronic circuit design
FERNSLER MATTHEW EARL8 citations77
US8244515B2Aug 14, 2012
Structure for detecting clock gating opportunities in a pipelined electronic circuit design
FERNSLER MATTHEW EARL5 citations56