Inventor

SEO HYEOUNG-WON

KR45 patents

⚠️ This page may combine multiple inventors who share the name “SEO HYEOUNG-WON”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SEO HYEOUNG-WON

SAMSUNG ELECTRONICS CO LTD

Semiconductor devices having transistors with vertical channels and method of fabricating the same

Semiconductor device having vertical transistor and method of fabricating the same

Circuit device including vertical transistors connected to buried bitlines and method of manufacturing the same

Bulk substrates in FinFETs with trench insulation surrounding FIN pairs having FINs separated by recess hole shallower than trench

Semiconductor die with protective layer and related method of processing a semiconductor wafer

Semiconductor memory device with vertical channel formed on semiconductor pillars

Semiconductor memory device having vertical channel transistor and method for fabricating the same

Method of forming semiconductor devices having a vertical channel transistor

DRAM device with cell epitaxial layers partially overlap buried cell gate electrode

Asymmetric source/drain transistor employing selective epitaxial growth (SEG) layer and method of fabricating same

Semiconductor memory device with vertical channel transistor and method of fabricating the same

Method of manufacturing a semiconductor memory device including a transistor

Asymmetric source/drain transistor employing selective epitaxial growth (SEG) layer and method of fabricating same

Method of fabricating fin field effect transistor using isotropic etching technique

Semiconductor device having buried gate line and method of fabricating the same

Semiconductor device and fabricating method thereof

Method of forming asymmetric MOS transistor with a channel stopping region and a trench-type gate

Semiconductor device and method of manufacturing the same

Semiconductor die with protective layer and related method of processing a semiconductor wafer

Method of fabricating semiconductor device with cell epitaxial layers partially overlap buried cell gate electrode

Semiconductor device having reduced die-warpage and method of manufacturing the same

Semiconductor device having a vertical channel and method of manufacturing same

Dynamic random access memory device

Transistors of semiconductor device having channel region in a channel-portion hole and methods of forming the same

Semiconductor device and method of manufacturing the same

Semiconductor device and method of manufacturing the same

Semiconductor device including conductive lines with fine line width and method of fabricating the same

Method of forming contact structure and method of fabricating semiconductor device using the same

Method of fabricating fin field effect transistor using isotropic etching technique

Transistor of a semiconductor device having a punchthrough protection layer and methods of forming the same

Transistor having asymmetric channel region, semiconductor device including the same, and method of fabricating semiconductor device including the same

Recessed-type field effect transistor with reduced body effect

Method of manufacturing recess type MOS transistor having a dual diode impurity layer structure

Semiconductor devices having a vertical channel transistor

Transistors of semiconductor device having channel region in a channel-portion hole and methods of forming the same

Semiconductor memory device having balancing capacitors

Semiconductor memory device

Integrated circuit wire patterns including integral plug portions

SEO HYEOUNG-WON

Methods of fabricating semiconductor devices having buried word line interconnects

Semiconductor memory device having vertical channel transistor and method for fabricating the same

Semiconductor memory device having balancing capacitors

Semiconductor memory device having vertical channel transistor and method for fabricating the same

Semiconductor device including conductive lines with fine line width and method of fabricating the same

KIM BONG-SOO

Semiconductor device having vertical transistor and method of fabricating the same

KIM SUN-JOON

Semiconductor die with protective layer and related method of processing a semiconductor wafer