Inventor
BOUDON GERARD
FR12 patents
Patents
12 patentsUS7404115B2Jul 22, 2008
Self-synchronising bit error analyser and circuit
IBM11 citations82
US6219744B1Apr 17, 2001
Interrupt masker for an interrupt handler with double-edge interrupt request signals detection
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Decoding and selection circuit for a monolithic memory
IBM21 citations78
US5075574ADec 24, 1991
Differential cascode current switch (dccs) logic circuit family with input diodes
IBM12 citations72
US5166552ANov 24, 1992
Multi-emitter bicmos logic circuit family with superior performance
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US4539680ASep 3, 1985
Chip to chip information bit transmission process and device
IBM9 citations68
US4988893AJan 29, 1991
Latch cell family in CMOS technology gate array
IBM17 citations66
US7661039B2Feb 9, 2010
Self-synchronizing bit error analyzer and circuit
IBM4 citations61
US5023478AJun 11, 1991
Complementary emitter follower drivers
IBM5 citations60
US5010257AApr 23, 1991
BICMOS logic circuit with full swing operation
IBM6 citations59
US4950927AAug 21, 1990
Logic circuits for forming VLSI logic networks
IBM2 citations57
US4856000AAug 8, 1989
Duplicated circuit arrangement for fast transmission and repairability
IBM2 citations54