P

Inventor

HOWELL WAYNE J

US34 patents

Patents

34 patents
US6358627B2Mar 19, 2002

Rolling ball connector

IBM164 citations99
US6265771B1Jul 24, 2001

Dual chip with heat sink

IBM209 citations99
US5926029AJul 20, 1999

Ultra fine probe contacts

IBM151 citations99
US5571754ANov 5, 1996

Method of fabrication of endcap chip with conductive, monolithic L-connect for multichip stack

IBM191 citations99
US5567654AOct 22, 1996

Method and workpiece for connecting a thin layer to a monolithic electronic module's surface and associated module packaging

IBM150 citations99
US5563086AOct 8, 1996

Integrated memory cube, structure and fabrication

IBM195 citations99
US5561622AOct 1, 1996

Integrated memory cube structure

IBM250 citations99
US5478781ADec 26, 1995

Polyimide-insulated cube package of stacked semiconductor device chips

IBM174 citations99
US5466634ANov 14, 1995

Electronic modules with interconnected surface metallization layers and fabrication methods therefore

IBM153 citations99
US6611050B1Aug 26, 2003

Chip edge interconnect apparatus and method

IBM79 citations98
US6559666B2May 6, 2003

Method and device for semiconductor testing using electrically conductive adhesives

IBM80 citations98
US6271102B1Aug 7, 2001

Method and system for dicing wafers, and semiconductor structures incorporating the products thereof

IBM125 citations98
US6233184B1May 15, 2001

Structures for wafer level test and burn-in

IBM102 citations98
US6177729B1Jan 23, 2001

Rolling ball connector

IBM84 citations98
US5502667AMar 26, 1996

Integrated multichip memory module structure

IBM291 citations97
US6258627B1Jul 10, 2001

Underfill preform interposer for joining chip to substrate

IBM69 citations96
US5903045AMay 11, 1999

Self-aligned connector for stacked chip module

IBM51 citations96
US5517754AMay 21, 1996

Fabrication processes for monolithic electronic modules

IBM98 citations96
US5517057AMay 14, 1996

Electronic modules with interconnected surface metallization layers

IBM87 citations96
US7132841B1Nov 7, 2006

Carrier for test, burn-in, and first level packaging

IBM37 citations93
US6426241B1Jul 30, 2002

Method for forming three-dimensional circuitization and circuits formed

IBM39 citations93
US6915795B2Jul 12, 2005

Method and system for dicing wafers, and semiconductor structures incorporating the products thereof

IBM20 citations92
US6806578B2Oct 19, 2004

Copper pad structure

IBM32 citations92
US6426904B2Jul 30, 2002

Structures for wafer level test and burn-in

IBM43 citations92
US6288559B1Sep 11, 2001

Semiconductor testing using electrically conductive adhesives

IBM20 citations92
US5596226AJan 21, 1997

Semiconductor chip having a chip metal layer and a transfer metal and corresponding electronic module

IBM32 citations92
US6104082AAug 15, 2000

Metallization structure for altering connections

IBM44 citations87
US7394268B2Jul 1, 2008

Carrier for test, burn-in, and first level packaging

IBM13 citations84
US6645789B2Nov 11, 2003

On chip alpha-particle detector

IBM12 citations74
US6545330B1Apr 8, 2003

On chip alpha-particle detector

IBM5 citations74
US6268739B1Jul 31, 2001

Method and device for semiconductor testing using electrically conductive adhesives

IBM12 citations74
US6030855AFeb 29, 2000

Self-aligned connector for stacked chip module

IBM14 citations74
US5614277AMar 25, 1997

Monolithic electronic modules--fabrication and structures

IBM9 citations74
US6600213B2Jul 29, 2003

Semiconductor structure and package including a chip having chamfered edges

IBM7 citations73