Inventor
TEMPLE III JOSEPH L
US22 patents
⚠️ This page may combine multiple inventors who share the name “TEMPLE III JOSEPH L”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
20 patentsUS6675149B1Jan 6, 2004
Information technology project assessment method, system and program product
IBM173 citations97
US6526387B1Feb 25, 2003
Method, system and program product for determining the value of a proposed technology modification
IBM117 citations97
US6985951B2Jan 10, 2006
Inter-partition message passing method, system and program product for managing workload in a partitioned processing environment
IBM59 citations96
US6643763B1Nov 4, 2003
Register pipe for multi-processing engine environment
IBM73 citations96
US6249769B1Jun 19, 2001
Method, system and program product for evaluating the business requirements of an enterprise for generating business solution deliverables
IBM252 citations96
US6968324B1Nov 22, 2005
Method, system and program product for evaluating a computational processing capacity migration between computer platforms
IBM63 citations94
US6260020B1Jul 10, 2001
Method, system and program product for sizing a computer system migration programming effort
IBM51 citations94
US7089558B2Aug 8, 2006
Inter-partition message passing method, system and program product for throughput measurement in a partitioned processing environment
IBM57 citations93
US6615281B1Sep 2, 2003
Multi-node synchronization using global timing source and interrupts following anticipatory wait state
IBM24 citations92
US6587833B1Jul 1, 2003
Computational workload-based hardware sizer method, system and program product
IBM23 citations92
US5148538ASep 15, 1992
Translation look ahead based cache access
IBM85 citations91
US6766437B1Jul 20, 2004
Composite uniprocessor
IBM23 citations90
US6557008B1Apr 29, 2003
Method for managing a heterogeneous IT computer complex
IBM103 citations90
US5269009ADec 7, 1993
Processor system with improved memory transfer means
IBM25 citations89
US5032985AJul 16, 1991
Multiprocessor system with memory fetch buffer invoked during cross-interrogation
IBM45 citations88
US7698505B2Apr 13, 2010
Method, system and computer program product for data caching in a distributed coherent cache system
IBM9 citations84
US4764865AAug 16, 1988
Circuit for allocating memory cycles to two processors that share memory
IBM20 citations82
US5428762AJun 27, 1995
Expandable memory having plural memory cards for distributively storing system data
IBM16 citations74
US7085915B1Aug 1, 2006
Programmable prefetching of instructions for a processor executing a non-procedural program
IBM9 citations71
US8806080B1Aug 12, 2014
Hardware sizing
IBM1 citations52