Inventor

SERVALLI GIORGIO

IT65 patents

⚠️ This page may combine multiple inventors who share the name “SERVALLI GIORGIO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SERVALLI GIORGIO

MICRON TECHNOLOGY INC

Ferroelectric memory cell recovery

Ferroelectric memory cell recovery

Memory devices and methods of forming memory devices

Fuses, and methods of forming and using fuses

Forming resistive random access memories together with fuse arrays

Memory devices and methods of forming memory devices

Integrated assemblies and methods of forming integrated assemblies

Memory cell biasing techniques

Open page biasing techniques

Ferroelectric memory cell recovery

Ferroelectric memory cell recovery

Methods of forming phase change memory apparatuses

Ferroelectric memory cell recovery

Phase change memory apparatuses

Forming resistive random access memories together with fuse arrays

Fuses, and methods of forming and using fuses

Memory devices and methods of forming memory devices

Integrated assemblies and methods of forming integrated assemblies

Integrated assemblies and methods of forming integrated assemblies

Integrated assemblies and methods of forming integrated assemblies

Memory cell biasing techniques during a read operation

Memory devices and methods of forming memory devices

Apparatuses, systems, and methods for configurable memory

Integrated assemblies and methods of forming integrated assemblies

Integrated assemblies and methods of forming integrated assemblies

Memory cell biasing techniques

Array of capacitors, an array of memory cells, method used in forming an array of memory cells, methods used in forming an array of capacitors, and methods used in forming a plurality of horizontally-spaced conductive lines

Methods of incorporating leaker devices into capacitor configurations to reduce cell disturb, and capacitor configurations incorporating leaker devices

Array of capacitors, an array of memory cells, method used in forming an array of memory cells, methods used in forming an array of capacitors, and methods used in forming a plurality of horizontally-spaced conductive lines

Memory cell biasing techniques during a read operation

Open page biasing techniques

Methods of forming memory cells

Methods of forming memory cells and arrays

Memory failure prediction and mitigation

Formation for memory cells

Memory activation timing management

Differential storage in memory arrays

Techniques to manufacture ferroelectric memory devices

Predictive sanitization of an array of memory with capacitive cells and/or ferroelectric cells

Memory activation timing management

Transistors, memory arrays, and methods used in forming an array of memory cells individually comprising a transistor

REDAELLI ANDREA

Forming resistive random access memories together with fuse arrays

Fuses, and methods of forming and using fuses

Memory cells having heaters with angled sidewalls

PIROVANO AGOSTINO

Fabricating bipolar junction select transistors for semiconductor memories

Fabricating bipolar junction select transistors for semiconductor memories

ST MICROELECTRONICS SRL

Process for forming differential spaces in electronics device integrated on a semiconductor substrate

Process of manufacture of a non-volatile memory with electric continuity of the common source lines

GHILARDI TECLA

Reference cell layout with enhanced RTN immunity

BRAZZELLI DANIELA

Method for manufacturing differential isolation structures in a semiconductor electronic device and corresponding structure