Inventor
RELL JR JOHN G
US33 patents
⚠️ This page may combine multiple inventors who share the name “RELL JR JOHN G”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
30 patentsUS9436434B2Sep 6, 2016
Checksum adder
IBM19 citations92
US7167968B2Jan 23, 2007
Storage pre-alignment and EBCDIC, ASCII and unicode basic latin conversions for packed decimal data
IBM20 citations90
US7913068B2Mar 22, 2011
System and method for providing asynchronous dynamic millicode entry prediction
IBM7 citations84
US7085917B2Aug 1, 2006
Multi-pipe dispatch and execution of complex instructions in a superscalar processor
IBM18 citations84
US7266580B2Sep 4, 2007
Modular binary multiplier for signed and unsigned operands of variable widths
IBM10 citations83
US9582324B2Feb 28, 2017
Controlling execution of threads in a multi-threaded processor
IBM3 citations73
US7853635B2Dec 14, 2010
Modular binary multiplier for signed and unsigned operands of variable widths
IBM6 citations73
US9389955B1Jul 12, 2016
String dataflow error detection
IBM3 citations72
US7412476B2Aug 12, 2008
Decimal multiplication for superscaler processors
IBM2 citations63
US7167889B2Jan 23, 2007
Decimal multiplication for superscaler processors
IBM5 citations63
US7149767B2Dec 12, 2006
Method and system for determining quotient digits for decimal division in a superscaler processor
IBM4 citations63
US9766859B2Sep 19, 2017
Checksum adder
IBM1 citations62
US7200742B2Apr 3, 2007
System and method for creating precise exceptions
IBM4 citations62
US10540183B2Jan 21, 2020
Accelerated execution of execute instruction target
IBM0 citations52
US9875107B2Jan 23, 2018
Accelerated execution of execute instruction target
IBM0 citations52
US9575802B2Feb 21, 2017
Controlling execution of threads in a multi-threaded processor
IBM1 citations52
US9389865B1Jul 12, 2016
Accelerated execution of target of execute instruction
IBM1 citations52
US7971034B2Jun 28, 2011
Reduced overhead address mode change management in a pipelined, recycling microprocessor
IBM1 citations52
US7913067B2Mar 22, 2011
Method and system for overlapping execution of instructions through non-uniform execution pipelines in an in-order processor
IBM0 citations52
US9928032B2Mar 27, 2018
Checksum adder
IBM0 citations51
US9766896B2Sep 19, 2017
Optimizing grouping of instructions
IBM0 citations51
US9715420B2Jul 25, 2017
String dataflow error detection
IBM0 citations51
US9710278B2Jul 18, 2017
Optimizing grouping of instructions
IBM0 citations51
US9588838B2Mar 7, 2017
String dataflow error detection
IBM0 citations51
US9535659B2Jan 3, 2017
Checksum adder
IBM0 citations51
US9501262B2Nov 22, 2016
Vectorized Galois field multiplication
IBM0 citations51
US9471281B2Oct 18, 2016
Vectorized Galois field multiplication
IBM0 citations51
US7490121B2Feb 10, 2009
Modular binary multiplier for signed and unsigned operands of variable widths
IBM0 citations51
US7921279B2Apr 5, 2011
Operand and result forwarding between differently sized operands in a superscalar processor
IBM0 citations40
US7962726B2Jun 14, 2011
Recycling long multi-operand instructions
IBM0 citations39