Inventor

CHO WON-SEOK

KR52 patents

⚠️ This page may combine multiple inventors who share the name “CHO WON-SEOK”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHO WON-SEOK

SAMSUNG ELECTRONICS CO LTD

Unitary interconnection structures integral with a dielectric layer

Semiconductor devices having thin film transistors and methods of fabricating the same

Stacked memory and method for forming the same

NAND flash memory devices having 3-dimensionally arranged memory cells and methods of fabricating the same

Unitary interconnection structures integral with a dielectric layer and fabrication methods thereof

Non-volatile memory device having vertical structure and method of operating the same

Methods of manufacturing a semiconductor device

Semiconductor integrated circuit devices having single crystalline thin film transistors and methods of fabricating the same

Methods of fabricating a semiconductor device having a node contact structure of a CMOS inverter

Body-tied-to-source MOSFETs with asymmetrical source and drain regions and methods of fabricating the same

Method of forming single crystal semiconductor thin film on insulator and semiconductor device fabricated thereby

Vertical non-volatile memory device including plural word line stacks

Vertical non-volatile memory device, method of fabricating the same device, and electric-electronic system having the same device

Vertical non-volatile memory device, method of fabricating the same device, and electric-electronic system having the same device

Vertical non-volatile memory device, method of fabricating the same device, and electric-electronic system having the same device

Non-volatile memory device having vertical structure and method of operating the same

Nand-type non-volatile memory device

Methods of forming SRAM cells having landing pad in contact with upper and lower cell gate patterns

Methods of fabricating semiconductor integrated circuits using selective epitaxial growth and partial planarization techniques

Semiconductor devices with a source/drain regions formed on a recessed portion of an isolation layer

Transistor and method of fabricating the same

SRAM cells having landing pad in contact with upper and lower cell gate patterns and methods of forming the same

Contact structures in substrate having bonded interface, semiconductor device including the same, methods of fabricating the same

Method for forming semiconductor device having metallization comprising select lines, bit lines and word lines

Semiconductor memory device having metallization comprising select lines, bit lines and word lines

Methods of fabricating semiconductor devices having thin film transistors

Semiconductor devices having high conductivity gate electrodes with conductive line patterns thereon

Semiconductor memory device and electronic system including the same

Semiconductor memory device and electronic system including the same

Vertical non-volatile memory device and method of fabricating the same

Methods of forming nand-type nonvolatile memory devices

Transistor and method of fabricating the same

Methods of fabricating semiconductor devices with a source/drain formed on a recessed portion of an isolation layer

HWANG SUNG-MIN

Vertical type semiconductor devices

Methods of manufacturing a semiconductor device

Vertical non-volatile memory device and electric-electronic system having the same device

Vertical non-volatile memory device and method of fabricating the same

JEONG JAE-HUN

Non-volatile memory device having vertical structure and method of operating the same

Non-volatile memory device having vertical structure and method of operating the same

LG ELECTRONICS INC

Protocol interfacing method

Method for encrypting data using IEEE 1394 serial bus network

LG ENERGY SOLUTION LTD

Electrode quality evaluation method and electrode manufacturing method

Dry quality evaluation device for electrode and dry quality evaluation method for electrode

SAMSUNG DISPLAY CO LTD

Method of depositing organic material

Substrate centering device and organic material deposition system

SHIM JAE-JOO

Manufacturing semiconductor devices

MOON HUI-CHANG

Flash memory device having vertical channel structure

JANG YOUNG-CHUL

Method for forming semiconductor device having metallization comprising select lines, bit lines and word lines

LEE JONG-WOO

Deposition source

PARK JAE-MORK

Substrate centering device and organic material deposition system