Inventor

STRECK CHRISTOF

DE23 patents

⚠️ This page may combine multiple inventors who share the name “STRECK CHRISTOF”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

STRECK CHRISTOF

ADVANCED MICRO DEVICES INC

Hot plate cure process for BCB low k interlevel dielectric

Apparatus and methods for uniform scan dispensing of spin-on materials

Semiconductor device having a polysilicon line structure with increased metal silicide portions and method for forming the polysilicon line structure of a semiconductor device

Low-k dielectric layer stack including an etch indicator layer for use in the dual damascene technique

Method for forming a self-aligned nitrogen-containing copper silicide capping layer in a microstructure device

Technique for strain engineering in Si-based Transistors by using embedded semiconductor layers including atoms with high covalent radius

Method of forming an epitaxial layer for raised drain and source regions by removing contaminations

Technique for reducing silicide defects by reducing deleterious effects of particle bombardment prior to silicidation

Technique for forming nickel silicide by depositing nickel from a gaseous precursor

Semiconductor device comprising a copper alloy as a barrier layer in a copper metallization layer

GLOBALFOUNDRIES INC

Method of manufracturing increasing reliability of copper-based metallization structures in a microstructure device by using aluminum nitride

Increasing reliability of copper-based metallization structures in a microstructure device by using aluminum nitride

Semiconductor structure and method of forming the same

Integrated circuits with an insultating layer and methods for producing such integrated circuits

STRECK CHRISTOF

Increasing reliability of copper-based metallization structures in a microstructure device by using aluminum nitride

Enhancing structural integrity and defining critical dimensions of metallization systems of semiconductor devices by using ALD techniques

Semiconductor device comprising a copper alloy as a barrier layer in a copper metallization layer

Increased stability of a complex material stack in a semiconductor device by providing fluorine enriched interfaces

KAHLERT VOLKER

Metal cap layer with enhanced etch resistivity for copper-based metal regions in semiconductor devices

Method of fabricating a metal cap layer with enhanced etch resistivity for copper-based metal regions in semiconductor devices

RUELKE HARTMUT

Technique for forming a dielectric interlayer above a structure including closely spaced lines

MAYER ULRICH

Increased density of low-K dielectric materials in semiconductor devices by applying a UV treatment

KAMMLER THORSTEN

Methods of fabricating a semiconductor IC having a hardened shallow trench isolation (STI)