Inventor
DENNISON KEITH
GB12 patents
⚠️ This page may combine multiple inventors who share the name “DENNISON KEITH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
CADENCE DESIGN SYSTEMS INC
6 patentsUS9047424B1Jun 2, 2015
System and method for analog verification IP authoring and storage
CADENCE DESIGN SYSTEMS INC8 citations84
US9589085B1Mar 7, 2017
Systems and methods for viewing analog simulation check violations in an electronic design automation framework
CADENCE DESIGN SYSTEMS INC8 citations82
US7277804B2Oct 2, 2007
Method and system for performing effective resistance calculation for a network of resistors
CADENCE DESIGN SYSTEMS INC10 citations76
US9223925B2Dec 29, 2015
Methods, systems, and articles of manufacture for implementing electronic circuit designs with simulation awareness
CADENCE DESIGN SYSTEMS INC3 citations73
US9501598B1Nov 22, 2016
System and method for assertion publication and re-use
CADENCE DESIGN SYSTEMS INC4 citations71
US9286420B1Mar 15, 2016
Methods, systems, and articles for implementing extraction and electrical analysis-driven module creation
CADENCE DESIGN SYSTEMS INC2 citations60
GOPALAKRISHNAN PRAKASH
4 patentsUS8261228B1Sep 4, 2012
Technique for modeling parasitics from layout during circuit design and for parasitic aware circuit design using modes of varying accuracy
GOPALAKRISHNAN PRAKASH42 citations94
US8694933B2Apr 8, 2014
Methods, systems, and articles of manufacture for implementing electronic circuit designs with simulation awareness
GOPALAKRISHNAN PRAKASH5 citations82
US8612921B1Dec 17, 2013
Technique for modeling parasitics from layout during circuit design and for parasitic aware circuit design using modes of varying accuracy
GOPALAKRISHNAN PRAKASH6 citations80
US8584072B1Nov 12, 2013
Technique for modeling parasitics from layout during circuit design and for parasitic aware circuit design using modes of varying accuracy
GOPALAKRISHNAN PRAKASH9 citations80