Inventor

ZHANG JOHN HONGGUANG

US28 patents

⚠️ This page may combine multiple inventors who share the name “ZHANG JOHN HONGGUANG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ZHANG JOHN HONGGUANG

ST MICROELECTRONICS INC

Transistor with self-aligned source and drain contacts and method of making same

Backside source-drain contact for integrated circuit transistor devices and method of making same

Self-aligned bottom up gate contact and top down source-drain contact structure in the premetallization dielectric or interlevel dielectric layer of an integrated circuit

High density resistive random access memory (RRAM)

High density resistive random access memory (RRAM)

Backside source-drain contact for integrated circuit transistor devices and method of making same

Method for manufacturing a transistor having a sharp junction by forming raised source-drain regions before forming gate regions and corresponding transistor produced by said method

High density resistive random access memory (RRAM)

Self-aligned bottom up gate contact and top down source-drain contact structure in the premetallization dielectric or interlevel dielectric layer of an integrated circuit

Method for manufacturing a transistor having a sharp junction by forming raised source-drain regions before forming gate regions and corresponding transistor produced by said method

Transistor with self-aligned source and drain contacts and method of making same

High density resistive random access memory (RRAM)

Silicon carbide static induction transistor and process for making a silicon carbide static induction transistor

Method for manufacturing a transistor having a sharp junction by forming raised source-drain regions before forming gate regions and corresponding transistor produced by said method

Transistor with self-aligned source and drain contacts and method of making same

Vertical junction FinFET device and method for manufacture

Via, trench or contact structure in the metallization, prematallization dielectric or interlevel dielectric layers of an integrated circuit

Size-controllable opening and method of making same

Via, trench or contact structure in the metallization, premetallization dielectric or interlevel dielectric layers of an integrated circuit

High density resistive random access memory (RRAM)

Vertical junction FinFET device and method for manufacture

Silicon carbide static induction transistor and process for making a silicon carbide static induction transistor

Method for making a photonic integrated circuit having a plurality of lenses

Trench structure for high performance interconnection lines of different resistivity and method of making same

ZHANG JOHN HONGGUANG

Copper interconnect structure having a graphene cap

System for relieving stress and improving heat management in a 3D chip stack having an array of inter-stack connections

Photonic integrated circuit having a plurality of lenses

System for relieving stress and improving heat management in a 3D chip stack