Inventor

MISHRA UMESH K

US60 patents

⚠️ This page may combine multiple inventors who share the name “MISHRA UMESH K”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MISHRA UMESH K

UNIV CALIFORNIA

Fabrication of single or multiple gate field plates

P-GaN/AlGaN/AlN/GaN enhancement-mode field effect transistor

N-polar aluminum gallium nitride/gallium nitride enhancement-mode field effect transistor

Non-polar (Al,B,In,Ga)N quantum well and heterostructure materials and devices

Fabrication of nonpolar indium gallium nitride thin films, heterostructures and devices by metalorganic chemical vapor deposition

In-situ defect reduction techniques for nonpolar and semipolar (Al, Ga, In)N

Method for the growth of P-type gallium nitride and its alloys

(Al,Ga,In)N and ZnO direct wafer bonded structure for optoelectronic applications, and its fabrication method

Polarization-induced barriers for N-face nitride-based electronics

Method for wafer bonding (A1, In, Ga)N and Zn(S, Se) for optoelectronic applications

Method of controlling stress in group-III nitride films deposited on substrates

Polarization-doped field effect transistors (POLFETS) and materials and methods for making the same

Current aperture vertical electron transistors with ammonia molecular beam epitaxy grown p-type gallium nitride as a current blocking layer

Trenched vertical power field-effect transistors with improved on-resistance and breakdown voltage

(In,Ga,Al)N optoelectronic devices grown on relaxed (In,Ga,Al)N-on-GaN base layers

Structure for increasing mobility in a high electron mobility transistor

High mobility group-III nitride transistors with strained channels

Non-polar (Al,B,In,Ga)N quantum well and heterostructure materials and devices

III-N based material structures, methods, devices and circuit modules based on strain management

Method to control the relaxation of thick films on lattice-mismatched substrates

Interdigitated multiple pixel arrays of light-emitting devices

Interdigitated multiple pixel arrays of light-emitting devices

Interdigitated multiple pixel arrays of light-emitting devices

Method for heteroepitaxial growth of high channel conductivity and high breakdown voltage nitrogen polar high electron mobility transistors

Interdigitated multiple pixel arrays of light-emitting devices

CHAKRABORTY ARPAN

In-situ defect reduction techniques for nonpolar and semipolar (Al, Ga, In)N

Fabrication of nonpolar indium gallium nitride thin films, heterostructures, and devices by metalorganic chemical vapor deposition

In-situ defect reduction techniques for nonpolar and semipolar (Al, Ga, In)N

Fabrication of nonpolar indium gallium nitride thin films, heterostructures and devices by metalorganic chemical vapor deposition

CREE INC

Group III nitride based flip-chip intergrated circuit and method for fabricating

Group III nitride based flip-chip integrated circuit and method for fabricating

High efficiency LED with tunnel junction layer

UNIV NORTH CAROLINA STATE

High current, high voltage breakdown field effect transistor

Microelectronic electron emitter

Method of making high current, high voltage breakdown field effect transistor

MARCHAND HUGUES

Method of controlling stress in group-III nitride films deposited on substrates

Field-effect transistor with compositionally graded nitride layer on a silicaon substrate

HUGHES AIRCRAFT CO

Hemt structure with passivated donor layer

Fabrication of self-aligned, t-gate hemt

KELLER STACIA

Method for heteroepitaxial growth of high-quality N-face gallium nitride, indium nitride, and aluminum nitride and their alloys by metal organic chemical vapor deposition

Method for heteroepitaxial growth of high-quality N-face GaN, InN, and AlN and their alloys by metal organic chemical vapor deposition

PALACIOS TOMAS

Methods to shape the electric field in electron devices, passivate dislocations and point defects, and enhance the luminescence efficiency of optical devices

UNIV CALIFONIA

N-face high electron mobility transistors with low buffer leakage and low parasitic resistance

CHOWDHURY SRABANTI

Current aperture vertical electron transistors with ammonia molecular beam epitaxy grown P-type gallium nitride as a current blocking layer

CRAVEN MICHAEL D

Non-polar (Al,B,In,Ga)N quantum well and heterostructure materials and devices

MURAI AKIHIKO

Method for fabricating a direct wafer bonded optoelectronic device

CHINI ALESSANDRO

Fabrication of single or multiple gate field plates

FARRELL JR ROBERT M

Technique for the growth and fabrication of semipolar (Ga,Al,In,B)N thin films, heterostructures, and devices

IBBETSON JAMES P

Low resistance tunnel junctions in wide band gap materials and method of making same

MISHRA UMESH K

Method using low temperature wafer bonding to fabricate transistors with heterojunctions of Si(Ge) to III-N materials