Inventor
SEGELKEN ROSS
US16 patents
⚠️ This page may combine multiple inventors who share the name “SEGELKEN ROSS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
NVIDIA CORP
9 patentsUS10642744B2May 5, 2020
Memory type which is cacheable yet inaccessible by speculative instructions
NVIDIA CORP21 citations88
US9632976B2Apr 25, 2017
Lazy runahead operation for a microprocessor
NVIDIA CORP5 citations82
US10108424B2Oct 23, 2018
Profiling code portions to generate translations
NVIDIA CORP2 citations71
US9563432B2Feb 7, 2017
Dynamic configuration of processing pipeline based on determined type of fetched instruction
NVIDIA CORP6 citations67
US12511127B2Dec 30, 2025
Dynamic reconfiguration of a multi-core processor to a unified core
NVIDIA CORP0 citations54
US9891972B2Feb 13, 2018
Lazy runahead operation for a microprocessor
NVIDIA CORP0 citations50
US9823931B2Nov 21, 2017
Queued instruction re-dispatch after runahead
NVIDIA CORP0 citations50
US9740553B2Aug 22, 2017
Managing potentially invalid results during runahead
NVIDIA CORP0 citations50
US10324725B2Jun 18, 2019
Fault detection in instruction translations
NVIDIA CORP0 citations39