Inventor

YEH LING-YEN

TW106 patents

⚠️ This page may combine multiple inventors who share the name “YEH LING-YEN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

YEH LING-YEN

TAIWAN SEMICONDUCTOR MFG CO LTD

Negative capacitance FET with improved reliability performance

Multi-gate semiconductor device and method for forming the same

Conformal source and drain contacts for multi-gate field effect transistors

Integrated circuit structure and method with solid phase diffusion

Semiconductor device and manufacturing method thereof

Field-effect transistors having contacts to 2D material active region

Field-effect transistors having transition metal dichalcogenide channels and methods of manufacture

Conformal source and drain contacts for multi-gate field effect transistors

Integrated circuit structure and method with solid phase diffusion

Self-aligned passivation of active regions

Devices having transition metal dichalcogenide layers with different thicknesses and methods of manufacture

One-dimensional nanostructure growth on graphene and devices thereof

Field-effect transistors having black phosphorus channel and methods of making the same

Contacts to transition metal dichalcogenide and manufacturing methods thereof

Selective Fin-shaping process

Fin field-effect transistors having controlled fin height

Semiconductor structure

Method of manufacturing a semiconductor device

Semiconductor device and manufacturing method thereof

Method for forming gate-all-around structure

Method for forming integrated semiconductor device with 2D material layer

Method of manufacturing semiconductor device including ferroelectric layer having columnar-shaped crystals

Semiconductor device and manufacturing method thereof

Semiconductor device and method of forming the same

Semiconductor device and fabricating method thereof

Semiconductor device including standard cells with header/footer switch including negative capacitance

Gate-all-around structure and manufacturing method for the same

Semiconductor device and fabricating method thereof

Semiconductor device and manufacturing method thereof

Field-effect transistors having contacts to 2D material active region

Semiconductor device and manufacturing method thereof

Negative capacitance FET with improved reliability performance

Integrated semiconductor device with 2D material layer

System and method for test key characterizing wafer processing state

Method for manufacturing semiconductor devices

Semiconductor device and manufacturing method thereof

Semiconductor device and fabricating method thereof

TAIWAN SEMICONDUCTOR MFG

Source/drain strained layers

Self-aligned dual-metal silicide and germanide formation

Resolving pattern-loading issues of SiGe stressor

Contact structure of semiconductor device

Contact structure of semiconductor device

Gate electrode doping method for forming semiconductor integrated circuit microelectronic fabrication with varying effective gate dielectric layer thicknesses

Calculating carrier concentrations in semiconductor Fins using probed resistance

WANN CLEMENT HSINGJEN

Selective fin-shaping process using plasma doping and etching for 3-dimensional transistor applications

Contact structure of semiconductor device

Fin field effect transistors and methods for fabricating the same

Method of forming fin field-effect transistors having controlled fin height

WINDBOND ELECTRONICS CORP

Electrostatic discharge protection circuit

YU MING-HUA

Source/drain strained layers