Inventor

XU YONGAN

US89 patents

⚠️ This page may combine multiple inventors who share the name “XU YONGAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

XU YONGAN

IBM

Integration of super via structure in BEOL

Integration of super via structure in BEOL

Double self aligned via patterning

EUV pattern transfer with ion implantation and reduced impact of resist residue

Method of forming a straight via profile with precise critical dimension control

Forming vertical transport field effect transistors with uniform bottom spacer thickness

Work function metal fill for replacement gate fin field effect transistor process

Double self-aligned via patterning

Trench patterning with block first sidewall image transfer

Via formation using sidewall image transfer process to define lateral dimension

Via formation using sidewall image transfer process to define lateral dimension

Selective gas etching for self-aligned pattern transfer

Back-end-of-line single damascene top via spacer defined by pillar mandrels

Svia using a single damascene interconnect

Multiple patterning scheme integration with planarized cut patterning

Area selective cyclic deposition for VFET top spacer

Method of forming a straight via profile with precise critical dimension control

Controlling via critical dimension during fabrication of a semiconductor wafer

Image transfer using EUV lithographic structure and double patterning process

Avoiding gate metal via shorting to source or drain contacts

Metal via structure

Developer critical dimension control with pulse development

Multiple patterning scheme integration with planarized cut patterning

Double metal patterning

EUV pattern transfer with ion implantation and reduced impact of resist residue

Tunable adhesion of EUV photoresist on oxide surface

Extreme ultraviolet lithography patterning with directional deposition

Via design optimization to improve via resistance

Developer critical dimension control with pulse development

Controlling via critical dimension with a titanium nitride hard mask

Single trench damascene interconnect using TiN HMO

Spacer image transfer with double mandrel

Tunable adhesion of EUV photoresist on oxide surface

Extreme ultraviolet (EUV) mask stack processing

APPLIED MATERIALS INC

Imaging system and method of creating composite images

Methods and apparatus of processing transparent substrates

Measurement system and grating pattern array

Lithography method to form structures with slanted angle

Methods and apparatus of processing transparent substrates

Methods of greytone imprint lithography to fabricate optical devices

Imaging system and method of creating composite images

Mask orientation

Methods of greytone imprint lithography to fabricate optical devices

Mask orientation

Mask orientation

TESSERA LLC

Two-color self-aligned double patterning (SADP) to yield static random access memory (SRAM) and dense logic

Two-color self-aligned double patterning (SADP) to yield static random access memory (SRAM) and dense logic

AGENCY SCIENCE TECH & RES

Method of low temperature imprinting process with high pattern transfer yield

GLOBALFOUNDRIES INC

Inverted damascene interconnect structures

ADEIA SEMICONDUCTOR SOLUTIONS LLC

Two-color self-aligned double patterning (SADP) to yield static random access memory (SRAM) and dense logic