Inventor

KUMAR RAVINDER

US48 patents

⚠️ This page may combine multiple inventors who share the name “KUMAR RAVINDER”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KUMAR RAVINDER

SAMBANOVA SYSTEMS INC

Inter-node buffer-based streaming for reconfigurable processor-as-a-service (RPaaS)

Dataflow function offload to reconfigurable processors

Dataflow all-reduce for reconfigurable processor systems

Resource allocation for reconfigurable processors

Runtime execution of functions across reconfigurable processor

Executing a neural network graph using a non-homogenous set of reconfigurable processors

Inter-node execution of configuration files on reconfigurable processors using smart network interface controller (smartnic) buffers

Inter-processor execution of configuration files on reconfigurable processors using smart network interface controller (SmartNIC) buffers

Runtime execution of configuration files on reconfigurable processors with varying configuration granularity

Intra-node buffer-based streaming for reconfigurable processor-as-a-service (RPaaS)

Training a neural network using a non-homogenous set of reconfigurable processors

Inter-node execution of configuration files on reconfigurable processors using network interface controller (NIC) buffers

Data transfer between accessible memories of multiple processors incorporated in coarse-grained reconfigurable (CGR) architecture within heterogeneous processing system using one memory to memory transfer operation

Runtime patching of configuration files

Runtime virtualization of reconfigurable data flow resources

Configurable access to a reconfigurable processor by a virtual function

Handling interrupts from a virtual function in a system with a Multi-Die reconfigurable processor

Configurable access to a multi-die reconfigurable processor by a virtual function

Handling interrupts from a virtual function in a system with a reconfigurable processor

Data processing system with link-based resource allocation for reconfigurable processors

Interconnect-based resource allocation for reconfigurable processors

Time-multiplexed use of reconfigurable hardware

Runtime virtualization of reconfigurable data flow resources

Method and apparatus for data transfer between accessible memories of multiple processors in a heterogeneous processing system using two memory to memory transfer operations

Load balancing system for the execution of applications on reconfigurable processors

Method and apparatus for selecting data access method in a heterogeneous processing system with multiple processors

Method and apparatus for data access in a heterogeneous processing system with multiple processors using memory extension operation

Intelligent graph execution and orchestration engine for a reconfigurable data processor

Direct access to reconfigurable processor memory

ST MICROELECTRONICS INT NV

Level shifting circuit with conditional body biasing of transistors

Schmitt trigger in FDSOI technology

Driver circuit including driver transistors with controlled body biasing

Overvoltage protection circuit for a PMOS based switch

Integrated circuit with output driver that compensates for supply voltage variations

Level shifting circuit with conditional body biasing of transistors

QUALCOMM INC

Reference signals for narrowband communications

Controlling switch timing in time division duplexing devices

Narrowband retuning in wireless communications

Physical broadcast channel for channel correction

Spectrum partitioning using hilbert transform for improved frequency scan

Techniques for performing tracking using a physical broadcast channel

MICROSOFT TECHNOLOGY LICENSING LLC

Symbol rotation of cache line codewords for increased reliability with metadata

Decoding metadata encoded in error correction codes

ORACLE AMERICA INC

Efficient ACL lookup algorithms

SEARS BRANDS LLC

Mainframe migration tools

CHEMORA PHARMOCHEM

Disubstituted and trisubstituted derivatives of 2,3:4,6-di-O-isopropylidene-α-L-xylo-2-hexulofuranosonic acid having anti-cancer, anti-inflammatory and anti-proliferative activity

ST MICROELECTRONICS ROUSSET

Overvoltage protection circuit for a PMOS based switch

STMICROELECTRONICS INT NV

Negative voltage tolerant IO circuitry for IO pad