Inventor

STIGLIANI ALAN DANIEL

US2 patents

Patents

2 patents

US7519927B1Apr 14, 2009

Wiring methods to reduce metal variation effects on launch-capture clock pairs in order to minimize cycle-time overlap violations

IBM22 citations85

US7987587B2Aug 2, 2011

Method of forming solid vias in a printed circuit board

IBM5 citations60