Inventor

BEDELL STEPHEN W

US341 patents

⚠️ This page may combine multiple inventors who share the name “BEDELL STEPHEN W”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

BEDELL STEPHEN W

IBM

Nanowire mesh device and method of fabricating same

Nanowire mesh device and method of fabricating same

Relaxed, low-defect SGOI for strained Si CMOS applications

Ultra-thin, high quality strained silicon-on-insulator formed by elastic strain transfer

Ion implantation combined with in situ or ex situ heat treatment for improved field effect transistors

Method for preventing sidewall consumption during oxidation of SGOI islands

Method of Forming strained SI/SIGE on insulator with silicon germanium buffer

Formation of silicon-germanium-on-insulator (SGOI) by an integral high temperature SIMOX-Ge interdiffusion anneal

Method of creating high-quality relaxed SiGe-on-insulator for strained Si CMOS applications

Wafer scale epitaxial graphene transfer

Superlattice lateral bipolar junction transistor

Integrating active matrix inorganic light emitting diodes for display devices

Thin light emitting diode and fabrication method

Strained thin body semiconductor-on-insulator substrate and device

High performance strained silicon FinFETs device and method for forming same

Strained silicon-on-insulator by anodization of a buried p+ silicon germanium layer

Formation of silicon-germanium-on-insulator (SGOI) by an integral high temperature SIMOX-Ge interdiffusion anneal

Relaxed, low-defect SGOI for strained Si CMOS applications

Formation of silicon-germanium-on-insulator (SGOI) by an integral high temperature SIMOX-Ge interdiffusion anneal

Use of hydrogen implantation to improve material properties of silicon-germanium-on-insulator material made by thermal diffusion

Method of improving the quality of defective semiconductor material

CMOS transistors with stressed high mobility channels

Method for manufacturing strained silicon directly-on-insulator substrate with hybrid crystalline orientation and different stress levels

Patterned strained silicon for high performance circuits

Combined dolan bridge and quantum dot josephson junction in series

Rechargeable lithium-ion battery with an anode structure containing a porous region

Monolithic integration of heterojunction solar cells

Silicon germanium-on-insulator formation by thermal mixing

Three-terminal non-volatile multi-state memory for cognitive computing applications

Magnetically guided chiplet displacement

Micro-LED array transfer

Monolithically integrated high voltage photovoltaics and light emitting diode with textured surface

Monolithically integrated high voltage photovoltaics and light emitting diode with textured surface

Method of making a gallium nitride device

Automatic defect detection and classification for high throughput electron channeling contrast imaging

Multi-beam electron microscope for electron channeling contrast imaging of semiconductor material

Superhydrophobic electrode and biosensing device using the same

Protective capping layer for spalled gallium nitride

Structure and method for highly strained germanium channel fins for high mobility pFINFETs

Method of forming a flexible semiconductor layer and devices on a flexible carrier

Monolithic integration of heterojunction solar cells

BEDELL STEPHEN W

Integrating active matrix inorganic light emitting diodes for display devices

Thin substrate fabrication using stress-induced substrate spalling

Strained CMOS device, circuit and method of fabrication

Breakdown voltage multiplying integration scheme

Strained devices, methods of manufacture and design structures

Thin substrate fabrication using stress-induced spalling

Strained thin body semiconductor-on-insulator substrate and device

FET nanopore sensor

KIM JEE HWAN

N-type carrier enhancement in semiconductors