Inventor

UHLIG RICHARD

US58 patents

⚠️ This page may combine multiple inventors who share the name “UHLIG RICHARD”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

UHLIG RICHARD

INTEL CORP

Tracking operating system process and thread execution and virtual machine execution in hardware or in a virtual machine monitor

Virtual translation lookaside buffer

Method of improving computer security through sandboxing

System and method to deprivilege components of a virtual machine monitor

Mechanism for providing power management through virtualization

Fault processing for direct memory access address translation

Caching support for direct memory access address translation

Maintaining processor resources during architectural events

Method and apparatus for constructing host processor soft devices independent of the host processor operating system

Method for resolving address space conflicts between a virtual machine monitor and a guest operating system

Synchronizing a translation lookaside buffer to an extended paging table

Chipset support for managing hardware interrupts in a virtual machine system

Mechanism to control hardware interrupt acknowledgement in a virtual machine system

Chipset support for managing hardware interrupts in a virtual machine system

Extended paging tables to map guest physical memory addresses from virtual memory page tables to host physical memory addresses in a virtual machine system

Invalidating translation lookaside buffer entries in a virtual machine (VM) system

Processor mode for limiting the operation of guest software running on a virtual machine supported by a virtual machine monitor

Use of multiple virtual machine monitors to handle privileged events

Providing support for single stepping a virtual machine in a virtual machine environment

Control register access virtualization performance improvement in the virtual-machine architecture

Control over faults occurring during the operation of guest software in the virtual-machine architecture

Reclaiming existing fields in address translation data structures to extend control over memory accesses

Handling faults associated with operation of guest software in the virtual-machine architecture

Method and apparatus for translating guest physical addresses in a virtual machine environment

Method for resolving address space conflicts between a virtual machine monitor and a guest operating system

Address translation for input/output devices using hierarchical translation tables

Optimizing system behavior in a virtual machine environment

Virtual translation lookaside buffer

Vectoring an interrupt or exception upon resuming operation of a virtual machine

Invalidating translation lookaside buffer entries in a virtual machine system

Synchronizing a translation lookaside buffer with an extended paging table

Maintaining processor resources during architectural events

Synchronizing a translation lookaside buffer with an extended paging table

Synchronizing a translation lookaside buffer with an extended paging table

Synchronizing a translation lookaside buffer with an extended paging table

Synchronizing a translation lookaside buffer with an extended paging table

Synchronizing a translation lookaside buffer with an extended paging table

Synchronizing a translation lookaside buffer with an extended paging table

Maintaining processor resources during architectural events

Method and apparatus for facilitating recognition of an open event window during operation of guest software in a virtual machine environment

BENNETT STEVEN M

Synchronizing a translation lookaside buffer with an extended paging table

Virtualizing physical memory in a virtual machine system utilizing multilevel translation table base registers to map guest virtual addresses to guest physical addresses then to host physical addresses

Translating a guest virtual address to a host physical address as guest software executes on a virtual machine

Optimizing processor-managed resources based on the behavior of a virtual machine monitor

Optimizing processor-managed resources based on the behavior of a virtual machine monitor

Synchronizing a translation lookaside buffer with an extended paging table

MADUKKARUMUKUMANA RAJESH

Direct memory access (DMA) address translation between peer-to-peer input/output (I/O) devices

Direct memory access (DMA) address translation between peer input/output (I/O) devices

SCHOINAS IOANNIS

Performance enhancement of address translation using translation tables covering large address spaces

COTA-ROBLES ERIC C

Invalidating translation lookaside buffer entries in a virtual machine (VM) system