P

Inventor

REBLEWSKI FREDERIC

FR37 patents
⚠️ This page may combine multiple inventors who share the name “REBLEWSKI FREDERIC”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MENTOR GRAPHICS CORP

20 patents
US5777489AJul 7, 1998

Field programmable gate array with integrated debugging facilities

MENTOR GRAPHICS CORP103 citations99
US5754827AMay 19, 1998

Method and apparatus for performing fully visible tracing of an emulation

MENTOR GRAPHICS CORP146 citations99
US5999725ADec 7, 1999

Method and apparatus tracing any node of an emulation

MENTOR GRAPHICS CORP90 citations98
US6057706AMay 2, 2000

Field programmable gate array with integrated debugging facilities

MENTOR GRAPHICS CORP47 citations96
US5790832AAug 4, 1998

Method and apparatus for tracing any node of an emulation

MENTOR GRAPHICS CORP55 citations96
US5574388ANov 12, 1996

Emulation system having a scalable multi-level multi-stage programmable interconnect network

MENTOR GRAPHICS CORP93 citations96
US7698118B2Apr 13, 2010

Logic design modeling and interconnection

MENTOR GRAPHICS CORP20 citations92
US6947882B1Sep 20, 2005

Regionally time multiplexed emulation system

MENTOR GRAPHICS CORP17 citations92
US6934674B1Aug 23, 2005

Clock generation and distribution in an emulation system

MENTOR GRAPHICS CORP59 citations92
US5907697AMay 25, 1999

Emulation system having a scalable multi-level multi-stage hybrid programmable interconnect network

MENTOR GRAPHICS CORP38 citations92
US7480610B2Jan 20, 2009

Software state replay

MENTOR GRAPHICS CORP28 citations91
US5831866ANov 3, 1998

Method and apparatus for removing timing hazards in a circuit design

MENTOR GRAPHICS CORP26 citations90
US5801955ASep 1, 1998

Method and apparatus for removing timing hazards in a circuit design

MENTOR GRAPHICS CORP32 citations90
US6876962B2Apr 5, 2005

Method and apparatus for concurrent emulation of multiple circuit designs on an emulation system

MENTOR GRAPHICS CORP14 citations84
US7130788B2Oct 31, 2006

Emulation components and system including distributed event monitoring, and testing of an IC design under emulation

MENTOR GRAPHICS CORP10 citations74
US7098688B2Aug 29, 2006

Regionally time multiplexed emulation system

MENTOR GRAPHICS CORP7 citations74
US7035787B2Apr 25, 2006

Emulation components and system including distributed routing and configuration of emulation resources

MENTOR GRAPHICS CORP7 citations74
US8346530B2Jan 1, 2013

Logic design modeling and interconnection

MENTOR GRAPHICS CORP2 citations63
US7305633B2Dec 4, 2007

Distributed configuration of integrated circuits in an emulation system

MENTOR GRAPHICS CORP4 citations57
US7924845B2Apr 12, 2011

Message-based low latency circuit emulation signal transfer

MENTOR GRAPHICS CORP3 citations56

M2000

6 patents

(unassigned)

5 patents

M2000 SA

2 patents

META SYSTEMS

2 patents

MENTOR GRAPHICS HOLDING LTD

1 patent

M2000 S A

1 patent