Inventor
LIN MIAO-CHUN
TW5 patents
Patents
5 patentsUS7378343B2May 27, 2008
Dual damascence process utilizing teos-based silicon oxide cap layer having reduced carbon content
UNITED MICROELECTRONICS CORP20 citations91
US7192878B2Mar 20, 2007
Method for removing post-etch residue from wafer surface
UNITED MICROELECTRONICS CORP20 citations90
US7628866B2Dec 8, 2009
Method of cleaning wafer after etching process
UNITED MICROELECTRONICS CORP7 citations71
US7214612B2May 8, 2007
Dual damascene structure and fabrication thereof
UNITED MICROELECTRONICS CORP5 citations59
US7687446B2Mar 30, 2010
Method of removing residue left after plasma process
UNITED MICROELECTRONICS CORP0 citations45