Inventor
VU TU TAM
US7 patents
Patents
7 patentsUS9508691B1Nov 29, 2016
Flipped die stacks with multiple rows of leadframe interconnects
INVENSAS CORP10 citations83
US10008469B2Jun 26, 2018
Wafer-level packaging using wire bond wires in place of a redistribution layer
INVENSAS CORP4 citations72
US9847238B2Dec 19, 2017
Fan-out wafer-level packaging using metal foil lamination
INVENSAS CORP3 citations72
US9543277B1Jan 10, 2017
Wafer level packages with mechanically decoupled fan-in and fan-out areas
INVENSAS CORP3 citations72
US9859257B2Jan 2, 2018
Flipped die stacks with multiple rows of leadframe interconnects
INVENSAS CORP0 citations51
US9646946B2May 9, 2017
Fan-out wafer-level packaging using metal foil lamination
INVENSAS CORP1 citations51
US9502372B1Nov 22, 2016
Wafer-level packaging using wire bond wires in place of a redistribution layer
INVENSAS CORP0 citations51