Inventor
CHRONEOS JR ROBERT J
US8 patents
Patents
8 patentsUS6259039B1Jul 10, 2001
Surface mount connector with pins in vias
INTEL CORP110 citations95
US6440770B1Aug 27, 2002
Integrated circuit package
INTEL CORP46 citations94
US5734559AMar 31, 1998
Staggered bond finger design for fine pitch integrated circuit packages
INTEL CORP47 citations92
US6043559AMar 28, 2000
Integrated circuit package which contains two in plane voltage busses and a wrap around conductive strip that connects a bond finger to one of the busses
INTEL CORP20 citations91
US6031283AFeb 29, 2000
Integrated circuit package
INTEL CORP19 citations91
US5787575AAug 4, 1998
Method for plating a bond finger of an intergrated circuit package
INTEL CORP28 citations91
US6459563B1Oct 1, 2002
Method and apparatus for polygonal heat slug
INTEL CORP3 citations62
US6256189B1Jul 3, 2001
Heat slug design which facilitates mounting of discrete components on a package without losing lands or pins in the package
INTEL CORP2 citations62