Inventor

FURUTANI KIYOHIRO

JP126 patents

⚠️ This page may combine multiple inventors who share the name “FURUTANI KIYOHIRO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

FURUTANI KIYOHIRO

MITSUBISHI ELECTRIC CORP

Semiconductor memory device

Clock generation circuit generating internal clock of small variation in phase difference from external clock, and semiconductor memory device including such clock generation circuit

Semiconductor device having an internal voltage generating circuit

Semiconductor memory device having a refresh-cycle program circuit

Dynamic semiconductor memory device having fast operation mode and operating with low current consumption

Random access memory with a plurality amplifier groups for reading and writing in normal and test modes

Internal high voltage generation circuit capable of stably generating internal high voltage and circuit element therefor

Semiconductor memory device and method of checking same for defect

Internal high voltage generation circuit capable of stably generating internal high voltage and circuit element therefor

Semiconductor memory device having data input/output circuit of small occupied area capable of high-speed data input/output

Power-on reset signal generator for semiconductor device

Semiconductor memory device that can have power consumption reduced

Dynamic semiconductor memory device having fast operation mode and operating with low current consumption

Semiconductor memory device having data input/output circuit of small occupied area capable of high-speed data input/output

Semiconductor memory device operating stably under low power supply voltage with low power consumption

Semiconductor memory device in which leakage current from defective memory cell can be suppressed during standby

Intermediate potential generator stably providing an internal voltage precisely held at a predeterminded intermediate potential level with reduced current consumption

Reference voltage generating circuit temperature-compensated without addition of manufacturing step and semiconductor device using the same

Dynamic type semiconductor memory device having an error checking and correcting circuit

Charge-transfer sense amplifier for dram and operating method therefor

Semiconductor memory device with folded bit line structure suitable for high density

Random access memory device operable in a normal mode and in a test mode

Semiconductor memory device having self-refresh function

Semiconductor memory device operating stably under low power supply voltage with low power consumption

Semiconductor memory device having controllable supplying capability of internal voltage

Semiconductor memory device achieving reduction in access time without increase in power consumption

Semiconductor memory device having internal address converting function, whose test and layout are conducted easily

Semiconductor memory device having controllable supplying capability of internal voltage

Semiconductor memory device and method of checking same for defect

Semiconductor memory device having controllable supplying capability of internal voltage

Semiconductor memory device having hierarchical boosted power-line scheme

Semiconductor integrated circuit device having improvement arrangement of pads

Semiconductor memory device and method of testing the same

Semiconductor neural circuit device having capacitive coupling and operating method thereof

Semiconductor memory device having error correcting circuit and method for correcting error

Syndrome generator for Hamming code and method for generating syndrome for Hamming code

Semiconductor memory device comprising trench memory cells

Semiconductor memory device

Semiconductor memory device

Semiconductor memory device capable of correctly and surely effecting voltage stress acceleration

Test circuit for a semiconductor memory device and method for burn-in test

Semiconductor memory device consistently operating a plurality of memory cell arrays distributed in arrangement

Output driver circuit for suppressing noise generation and integrated circuit device for burn-in test

Semiconductor memory device permitting high speed data transfer and high density integration

Semiconductor memory device carrying out input and output of data in a predetermined bit organization

Semiconductor device and manufacturing method thereof

RENESAS TECH CORP

Semiconductor memory device having multi-bit testing function

Internal high voltage generation circuit capable of stably generating internal high voltage and circuit element therefor

Semiconductor memory device having configuration for selecting desired delay locked loop clock

Semiconductor device capable of shortening test time and suppressing increase in chip area, and method of manufacturing semiconductor integrated circuit device