Inventor

ADAMS CHAD ALLEN

US22 patents

⚠️ This page may combine multiple inventors who share the name “ADAMS CHAD ALLEN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ADAMS CHAD ALLEN

IBM

Lower power and reduced device split local and continuous bitline for domino read SRAMs

Split local and continuous bitline for fast domino read SRAM

Column selectable self-biasing virtual voltages for SRAM write assist

Method and circuit for implementing enhanced SRAM write and read performance ring oscillator

Implementing enhanced SRAM read performance sort ring oscillator (PSRO)

Method and apparatus for implementing enhanced SRAM read performance sort ring oscillator (PSRO)

Implementing local evaluation of domino read SRAM with enhanced SRAM cell stability with minimized area usage

Method for implementing SRAM cell write performance evaluation

Method and sum addressed cell encoder for enhanced compare and search timing for CAM compare

Flood mode implementation for continuous bitline local evaluation circuit

Implementing enhanced dual mode SRAM performance screen ring oscillator

Design structure embodied in a machine readable medium for implementing SRAM cell write performance evaluation

Apparatus for implementing SRAM cell write performance evaluation

Methods and apparatus for accessing memory

High performance read bypass test for SRAM circuits

Delay mechanism for unbalanced read/write paths in domino SRAM arrays

Method and apparatus for testing a random access memory device

Pulse generator circuit and semiconductor device including same

Redundancy circuit for memory array and method for disabling non-redundant wordlines and for enabling redundant wordlines

Flood mode implementation for continuous bitline local evaluation circuit

ADAMS CHAD ALLEN

Active bit line droop for read assist

Implementing low power data predicting local evaluation for double pumped arrays