Inventor

SLEIGHT JEFFREY

US24 patents

⚠️ This page may combine multiple inventors who share the name “SLEIGHT JEFFREY”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SLEIGHT JEFFREY

CHANG JOSEPHINE

Nanomesh SRAM cell

Single gate inverter nanowire mesh

Nanowire mesh FET with multiple threshold voltages

Single gate inverter nanowire mesh

Nanomesh SRAM cell

Nanowire mesh FET with multiple threshold voltages

Graphene/nanostructure FET with self-aligned contact and gate

Semiconductor device including an asymmetric feature, and method of making the same

IBM

Techniques for enabling multiple Vt devices using high-K metal gate stacks

Metal-gated MOSFET devices having scaled gate stack thickness including gettering species in a buried oxide

Metal-gated MOSFET devices having scaled gate stack thickness

TFET with nanowire source

Superconducting circuit provided on an encapsulated vacuum cavity

Vacuum encapsulated Josephson junction

CHANG LELAND

High performance devices and high density devices on single chip

High performance devices and high density devices on single chip

Structure with reduced fringe capacitance

FRANK MARTIN M

Techniques for enabling multiple Vt devices using high-K metal gate stacks

Techniques for enabling multiple Vt devices using high-K metal gate stacks

GLOBALFOUNDRIES INC

Methods of forming multi-Vt III-V TFET devices

Semiconductor device including an asymmetric feature

CHUDZIK MICHAEL P

High-K dielectric and metal gate stack with minimal overlap with isolation region

BANGSARUNTIP SARUNYA

TFET with nanowire source

BARWICZ TYMON

Top-down nanowire thinning processes