P

Inventor

GREENSPAN DANIEL

IL22 patents
⚠️ This page may combine multiple inventors who share the name “GREENSPAN DANIEL”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

16 patents
US9436623B2Sep 6, 2016

Run-time fabric reconfiguration

INTEL CORP13 citations83
US9559726B2Jan 31, 2017

Use of error correcting code to carry additional data bits

INTEL CORP7 citations81
US10437769B2Oct 8, 2019

Transition-minimized low speed data transfer

INTEL CORP2 citations72
US10055360B2Aug 21, 2018

Apparatus and method for shared least recently used (LRU) policy between multiple cache levels

INTEL CORP3 citations71
US8817937B2Aug 26, 2014

System and method for performing timing control

INTEL CORP3 citations61
US10657070B2May 19, 2020

Apparatus and method for shared least recently used (LRU) policy between multiple cache levels

INTEL CORP0 citations51
US10657058B2May 19, 2020

Interleaved cache controllers with shared metadata and related devices and systems

INTEL CORP0 citations51
US10437732B2Oct 8, 2019

Multi-level cache with associativity collision compensation

INTEL CORP0 citations51
US9971691B2May 15, 2018

Selevtive application of interleave based on type of data to be stored in memory

INTEL CORP0 citations51
US9767042B2Sep 19, 2017

Enhancing cache performance by utilizing scrubbed state indicators associated with cache entries

INTEL CORP0 citations50
US9514047B2Dec 6, 2016

Apparatus and method to dynamically expand associativity of a cache memory

INTEL CORP1 citations50
US10635593B2Apr 28, 2020

Create page locality in cache controller cache allocation

INTEL CORP0 citations49
US10153784B2Dec 11, 2018

Use of error correcting code to carry additional data bits

INTEL CORP0 citations49
US9846648B2Dec 19, 2017

Create page locality in cache controller cache allocation

INTEL CORP0 citations49
US9542325B2Jan 10, 2017

Adjustable over-restrictive cache locking limit for improved overall performance

INTEL CORP0 citations49
US10304418B2May 28, 2019

Operating system transparent system memory abandonment

INTEL CORP0 citations40

Six Degrees Space Ltd

4 patents

CISCO TECH INC

1 patent

GREENSPAN DANIEL

1 patent