Inventor
LOO ROGER
BE16 patents
⚠️ This page may combine multiple inventors who share the name “LOO ROGER”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IMEC VZW
5 patentsUS9478544B2Oct 25, 2016
Method for forming a germanium channel layer for an NMOS transistor device, NMOS transistor device and CMOS device
IMEC VZW2 citations60
US9299563B2Mar 29, 2016
Method for forming a strained semiconductor structure
IMEC VZW0 citations51
US9502415B2Nov 22, 2016
Method for providing an NMOS device and a PMOS device on a silicon substrate and silicon substrate comprising an NMOS device and a PMOS device
IMEC VZW1 citations50
US12336239B2Jun 17, 2025
Tensile strained semiconductor monocrystalline nanostructure
IMEC VZW0 citations47
US9640411B2May 2, 2017
Method for manufacturing a transistor device comprising a germanium channel material on a silicon based substrate, and associated transistor device
IMEC VZW1 citations42
IMEC
3 patentsUS8384195B2Feb 26, 2013
Nanochannel device and method for manufacturing thereof
IMEC11 citations83
US8962369B2Feb 24, 2015
Method for doping semiconductor structures and the semiconductor device thereof
IMEC3 citations59
US9263263B2Feb 16, 2016
Method for selective growth of highly doped group IV—Sn semiconductor materials
IMEC0 citations48