Inventor

OOWADA KEN

JP67 patents

⚠️ This page may combine multiple inventors who share the name “OOWADA KEN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

OOWADA KEN

SANDISK TECHNOLOGIES INC

Dynamic erase depth for improved endurance of non-volatile memory

Verification process for non-volatile storage

Double verify method in multi-pass programming to suppress read noise

Double verify method with soft programming to suppress read noise

Non-volatile memory with prior state sensing

Dynamic bit line bias for programming non-volatile memory

Partitioned erase and erase verification in non-volatile memory

Dynamic bit line bias for programming non-volatile memory

Programming select gate transistors and memory cells using dynamic verify level

Programming select gate transistors and memory cells using dynamic verify level

Erase for non-volatile storage

Bit line current trip point modulation for reading nonvolatile storage elements

Temperature based compensation during verify operations for non-volatile storage

Program voltage compensation with word line bias change to suppress charge trapping in memory

Optimizing pass voltage and initial program voltage based on performance of non-volatile memory

Partial block erase for block programming in non-volatile memory

Verification process for non-volatile storage

Bit line current trip point modulation for reading nonvolatile storage elements

Program sequencing

SANDISK TECHNOLOGIES LLC

Three-dimensional memory device containing a shared word line driver across different tiers and methods for making the same

Read operation for non-volatile memory with compensation for adjacent wordline

Modulation of programming voltage during cycling

Modulation of programming voltage during cycling

Adaptive VPASS for 3D flash memory with pair string structure

Edge word line concurrent programming with verify for memory apparatus with on-pitch semi-circle drain side select gate technology

Non-volatile memory with switchable erase methods

Buried source line structure for boosting read scheme

Three-dimensional memory device including different height memory stack structures and methods of making the same

Concurrent programming of multiple cells for non-volatile memory devices

Three-dimensional memory device including different height memory stack structures and methods of making the same

Adaptive VPASS for 3D flash memory with pair string structure

Programming memory cells with concurrent storage of multi-level data as single-level data for power loss protection

Block quality classification at testing for non-volatile memory, and multiple bad block flags for product diversity

Threshold voltage setting with boosting read scheme

Concurrent programming of multiple cells for non-volatile memory devices

SANDISK CORP

Method for programming non-volatile memory with reduced program disturb using modified pass voltages

Selective application of program inhibit schemes in non-volatile memory

Boosting for non-volatile storage using channel isolation switching

Selective program voltage ramp rates in non-volatile memory

Apparatus for programming non-volatile memory with reduced program disturb using modified pass voltages

Self-boosting system with suppression of high lateral electric fields

Non-volatile storage with boosting using channel isolation switching

OOWADA KEN

Extra dummy erase pulses after shallow erase-verify to avoid sensing deep erased threshold voltage

Temperature based compensation during verify operations for non-volatile storage

DONG YINGDA

Nonvolatile memory and method for improved programming with reduced verify

Programming non-volatile storage including reducing impact from other memory cells

LI YAN

Non-volatile memory and method with improved first pass programming

DUTTA DEEPANSHU

Optimized erase operation for non-volatile memory with partially programmed block

LEE DANA

Read compensation for partially programmed blocks of non-volatile storage

HEMINK GERRIT JAN

Verification process for non-volatile storage