Inventor

RYU SOO-JUNG

KR51 patents

⚠️ This page may combine multiple inventors who share the name “RYU SOO-JUNG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

RYU SOO-JUNG

SAMSUNG ELECTRONICS CO LTD

Method, medium, and apparatus with interrupt handling in a reconfigurable array

Method and apparatus for interrupt handling during loop processing in reconfigurable coarse grained array

Coarse-grained reconfigurable processor and code decompression method thereof

Job scheduling optimization based on ratio of stall to active cycles

Multi-core apparatus and job scheduling method thereof

Job scheduling apparatus and job scheduling method thereof to assign jobs to a core

Cache control device for prefetching using pattern analysis processor and prefetch instruction and prefetching method using cache control device

Loop data processing system and method for dividing a loop into phases

Register allocation method and system for program compiling

Apparatus and method for optimizing loop buffer in reconfigurable processor

Graphics processing apparatus and method of processing graphics pipeline thereof

Coarse-grained reconfigurable array based on a static router

Method and apparatus for efficiently processing array operation in computer system

Job scheduling optimization based on ratio of stall to active cycles

Texture processing method and device

Processor and method for dynamically allocating processing elements to front end units using a plurality of registers

Method and apparatus for generating test bench for verification of processor decoder

Method and apparatus for generating test bench for verification of processor decoder

Coarse-grained reconfigurable array based on a static router

Method and apparatus for rendering curve

Functional unit for supporting multithreading, processor comprising the same, and operating method thereof

Apparatus and method for generating VLIW, and processor and method for processing VLIW

Processing device and a swizzle pattern generator

Method and apparatus for processing texture

Region growing apparatus and method using multi-core

Loop accelerator and data processing system having the same

Apparatus and method for graphics state management

Method of compiling program to be executed on multi-core processor, and task mapping method and task scheduling method of reconfigurable processor

EGGER BERNHARD

Apparatus and method for generating VLIW, and processor and method for processing VLIW

Reconfigurable processor with designated processing elements and reserved portion of register file for interrupt processing

Reconfigurable processor with pointers to configuration information and entry in NOP register at respective cycle to deactivate configuration memory for reduced power consumption

SEO WOONG

Apparatus to access multi-bank memory

Memory controller, method of controlling unaligned memory access, and computing apparatus incorporating memory controller

Latency management system and method for multiprocessor system

CHO YOUNG-CHUL

Simulation apparatus and method for multicore system

Simulator of multi-core system employing reconfigurable processor cores and method of simulating multi-core system employing reconfigurable processor cores

YOO DONG-HOON

Computing apparatus and method of handling interrupt

Profiler for optimizing processor architecture and application

CHUNG MOO-KYOUNG

Routing apparatus and network apparatus

Multi-port cache memory apparatus and method

PARK IL-HYUN

Reconfigurable processor with predicate signal activated operation configuration memory and separate routing configuration memory

Interrupt handling apparatus and method for equal-model processor and processor including the interrupt handling apparatus

RYU SOO-JUNG

Apparatus and method for generating code overlay

Computing apparatus and method using X-Y stack memory

YIM KEUN-SOO

Multitasking method and apparatus for reconfigurable array

OH TAE-WOOK

Apparatus and method for simulating a reconfigurable processor

JANG CHOON-KI

Multiprocessor using a shared virtual memory and method of generating a translation table

KIM HEE SEOK

Apparatus and method of exception handling for reconfigurable architecture

PARK SUNG BAE

Median filtering method and apparatus

CHO YEON-GON

Apparatus and method for routing data among multiple cores