Inventor

JALAL JAMSHED

US75 patents

⚠️ This page may combine multiple inventors who share the name “JALAL JAMSHED”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

JALAL JAMSHED

ADVANCED RISC MACH LTD

Apparatus and method for managing snoop operations

Interface circuitry for exchanging information with master, home, and slave nodes using different data transfer protocols

System, method and apparatus for enabling partial data transfers with indicators

Message protocol for a data processing system

High-performance streaming of ordered write stashes to enable optimized data sharing between I/O masters and CPUs

Inter-chip communication in a multi-chip system

Coherency checking of invalidate transactions caused by snoop filter eviction in an integrated circuit

Configurable cache coherency controller

Apparatus and method for handling cache maintenance operations

Snoop filter for cache coherency in a data processing system

Read-with overridable-invalidate transaction

Snoop filter for cache coherency in a data processing system

Progressive fine to coarse grain snoop filter

Coherency checking of invalidate transactions caused by snoop filter eviction in an integrated circuit

Apparatus and method for handling stash requests

Apparatus and method for routing access requests in an interconnect

Apparatus and method for processing an ownership upgrade request for cached data that is issued in relation to a conditional store operation

Memory controller having data access hint message for specifying the given range of one or more memory addresses

Data processing apparatus with snoop request address alignment and snoop response time alignment

Efficient support for variable width data channels in an interconnect network

Technique for handling protocol conversion

System architecture with query based address translation for access validation

System, method and apparatus for ordering logic

Cache for storing coherent and non-coherent data

Circuitry and method

Interconnect resource allocation

Cache content management

System, method and apparatus for accessing shared memory

Read transaction tracker lifetimes in a coherent interconnect system

Apparatus and method for processing burst read transactions

Separating completion and data responses for higher read throughput and lower link utilization in a data processing network

Multi-dimensional cache architecture

Snoop filter with imprecise encoding

Data processing network with flow compaction for streaming data transfer

System, method and apparatus for executing instructions

I/O coherent request node for data processing network with improved handling of write operations

Data processing system for a home node to authorize a master to bypass the home node to directly send data to a slave

CCIX port management for PCI express traffic

Technique for controlling stashing of data

Method and apparatus for efficient chip-to-chip data transfer

Writing zero data

Forwarding responses to snoop requests

Transfer protocol in a data processing network

Responding to snoop requests

Cache bypass

JALAL JAMSHED

Snoop filter and non-inclusive shared cache memory

Processing resource allocation within an integrated circuit supporting transaction requests of different priority levels

FREESCALE SEMICONDUCTOR INC

System and method for cache external writing and write shadowing

System and method for cache external writing

MANNAVA PHANINDRA KUMAR

Coherency controller and method for data hazard handling for copending data access requests