Inventor

KENNEL HAROLD W

US51 patents

⚠️ This page may combine multiple inventors who share the name “KENNEL HAROLD W”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KENNEL HAROLD W

INTEL CORP

Indium-rich NMOS transistor channels

Semiconductor device having germanium active layer with underlying diffusion barrier layer

High mobility strained channels for fin-based NMOS transistors

Ge and III-V channel semiconductor devices having maximized compliance and free surface relaxation

Tin doped III-V material contacts

Method of fabricating CMOS FinFETs by selectively etching a strained SiGe layer

Method of fabricating a semiconductor device with strained SiGe fins and a Si cladding layer

Device isolation by fixed charge

High-electron-mobility transistors with heterojunction dopant diffusion barrier

CMOS FinFET device with dual strained cladding layers on relaxed SiGe fins, and method of fabricating the same

Strained channel region transistors employing source and drain stressors and systems including the same

Aluminum indium phosphide subfin germanium channel transistors

Field effect transistors with wide bandgap materials

Integrated circuit with germanium-rich channel transistors including one or more dopant diffusion barrier elements

High-mobility field effect transistors with wide bandgap fin cladding

Methods and apparatus for gettering impurities in semiconductors

Low damage self-aligned amphoteric FINFET tip doping

Semiconductor nanowire device having (111)-plane channel sidewalls

Subfin leakage suppression using fixed charge

Semiconductor nanowire device having (111)-plane channel sidewalls

Group III-V semiconductor devices having asymmetric source and drain structures

Art trench spacers to enable fin release for non-lattice matched channels

Gradient doping to lower leakage in low band gap material devices

Thin film cap to lower leakage in low band gap material devices

Dopant diffusion barrier for source/drain to curb dopant atom diffusion

Low germanium, high boron silicon rich capping layer for PMOS contact resistance thermal stability

SiGe:GAB source or drain structures with low resistivity

Indium-containing fin of a transistor device with an indium-rich core

Transistors with high density channel semiconductor over dielectric material

Reducing band-to-band tunneling in semiconductor devices

Transistor structures having multiple threshold voltage channel materials

Group III-V material transistors employing nitride-based dopant diffusion barrier layer

Transistors with non-vertical gates

Stiff quantum layers to slow and or stop defect propagation

High mobility strained channels for fin-based NMOS transistors

Indium-rich NMOS transistor channels

Aluminum indium phosphide subfin germanium channel transistors

Germanium-rich channel transistors including one or more dopant diffusion barrier elements

Backside isolation for integrated circuit

III-V semiconductor alloys for use in the subfin of non-planar semiconductor devices and methods of forming the same

High-electron-mobility transistors with counter-doped dopant diffusion barrier

CMOS FinFET device having strained SiGe fins and a strained Si cladding layer on the NMOS channel

Strained channel region transistors employing source and drain stressors and systems including the same

GE and III-V channel semiconductor devices having maximized compliance and free surface relaxation

Reducing off-state leakage in semiconductor devices

Tin doped III-V material contacts

Carrier confinement for high mobility channel devices

LE VAN H

Strained channel region transistors employing source and drain stressors and systems including the same

RACHMADY WILLY

Semiconductor device having germanium active layer with underlying diffusion barrier layer

JENSEN JACOB M

Method for forming superactive deactivation-resistant junction with laser anneal and multiple implants