Inventor

HSU JONATHAN

US31 patents

⚠️ This page may combine multiple inventors who share the name “HSU JONATHAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HSU JONATHAN

SANDISK TECHNOLOGIES INC

Memory system and method for reducing read disturb errors

Smart reread in nonvolatile memory

Biasing schemes for storage of bits in unreliable storage locations

System and method for memory command queue management and configurable memory status checking

Write redirect

Block refresh to adapt to new die trim settings

MARENGO THERAPEUTICS INC

Method of treating solid cancers with bispecific interleukin-anti-TCRß molecules

Anti-TCR antibody molecules and uses thereof

Anti-TCR antibody molecules and uses thereof

Anti-TCR antibody molecules and uses thereof

Anti-TCR antibody molecules and uses thereof

Multifunctional molecules that bind to T cell related cancer cells and uses thereof

MANTLE INC

Method and system for automated toolpath generation

Method and system for automated toolpath generation

Method and system for automated toolpath generation

Method and system for automated toolpath generation

AVILA CHRIS NGA YEE

Data recovery in multi-level cell nonvolatile memory

Program failure handling in nonvolatile memory

HSU JONATHAN

Host stop-transmission handling

Non-volatile memory and method with improved data scrambling

WARNER BROS ENTERTAINMENT INC

Managing states of a gesture recognition device and an interactive casing

Gesture recognition device with minimal wand form factor

BILTZ MICHAEL J

Method, system and graphical user interface for configuring a simulator to simulate a plurality of devices

Method and system for simulating a plurality of devices

NANOCORE TECH INC

Method and system for automated toolpath generation

ABLYNX NV

Polypeptides inhibiting CD40L

TRAISTER SHAI

Program control of a non-volatile memory

TEXAS INSTRUMENTS INC

Contactors with signal pins, ground pins, and short ground pins

SANDISK TECHNOLOGIES LLC

Biasing schemes for storage of bits in unreliable storage locations

WOLFMAN JONATHAN

Device based wear leveling using intrinsic endurance

JEON SEUNGJUNE

Systems and methods of updating read voltages in a memory