P

Inventor

BAVISHI DHAWAL

US44 patents

Patents

44 patents
US11288199B2Mar 29, 2022

Separate read-only cache and write-read cache in a memory sub-system

MICRON TECHNOLOGY INC3 citations73
US11194518B2Dec 7, 2021

Pointer dereferencing within memory sub-system

MICRON TECHNOLOGY INC2 citations73
US11163486B2Nov 2, 2021

Memory sub-system-bounded memory function

MICRON TECHNOLOGY INC2 citations73
US11604749B2Mar 14, 2023

Direct memory access (DMA) commands for noncontiguous source and destination memory addresses

MICRON TECHNOLOGY INC2 citations72
US10990548B1Apr 27, 2021

Quality of service levels for a direct memory access engine in a memory sub-system

MICRON TECHNOLOGY INC4 citations72
US11409436B2Aug 9, 2022

Buffer management in memory systems for read and write requests

MICRON TECHNOLOGY INC2 citations71
US11099778B2Aug 24, 2021

Controller command scheduling in a memory system to increase command bus utilization

MICRON TECHNOLOGY INC3 citations71
US11074007B2Jul 27, 2021

Optimize information requests to a memory system

MICRON TECHNOLOGY INC2 citations71
US10969994B2Apr 6, 2021

Throttle response signals from a memory system

MICRON TECHNOLOGY INC2 citations71
US10782916B2Sep 22, 2020

Proactive return of write credits in a memory system

MICRON TECHNOLOGY INC3 citations71
US12346612B2Jul 1, 2025

Memory sub-system command fencing

MICRON TECHNOLOGY INC0 citations62
US12007917B2Jun 11, 2024

Priority scheduling in queues to access cache data in a memory sub-system

MICRON TECHNOLOGY INC0 citations62
US12007898B2Jun 11, 2024

Utilizing a designated memory address to pre-fetch for memory sub-system with cache

MICRON TECHNOLOGY INC1 citations62
US11941291B2Mar 26, 2024

Memory sub-system command fencing

MICRON TECHNOLOGY INC0 citations62
US11914520B2Feb 27, 2024

Separate read-only cache and write-read cache in a memory sub-system

MICRON TECHNOLOGY INC0 citations62
US11748273B2Sep 5, 2023

Secure data communication with memory sub-system

MICRON TECHNOLOGY INC0 citations62
US11741008B2Aug 29, 2023

Disassociating memory units with a host system

MICRON TECHNOLOGY INC0 citations62
US11698756B2Jul 11, 2023

Cache-based memory read commands

MICRON TECHNOLOGY INC0 citations62
US11675705B2Jun 13, 2023

Eviction of a cache line based on a modification of a sector of the cache line

MICRON TECHNOLOGY INC0 citations62
US11669265B2Jun 6, 2023

Memory sub-system-bounded memory function

MICRON TECHNOLOGY INC0 citations62
US11656995B2May 23, 2023

Dynamic access granularity in a cache media

MICRON TECHNOLOGY INC1 citations62
US11636047B2Apr 25, 2023

Hash operations in memory for data sharing

MICRON TECHNOLOGY INC0 citations62
US11573743B2Feb 7, 2023

Pointer dereferencing within memory sub-system

MICRON TECHNOLOGY INC0 citations62
US11461256B2Oct 4, 2022

Quality of service levels for a direct memory access engine in a memory sub-system

MICRON TECHNOLOGY INC0 citations62
US11449419B2Sep 20, 2022

Disassociating memory units with a host system

MICRON TECHNOLOGY INC0 citations62
US11262946B2Mar 1, 2022

Cache-based memory read commands

MICRON TECHNOLOGY INC0 citations62
US11249924B2Feb 15, 2022

Secure data communication with memory sub-system

MICRON TECHNOLOGY INC0 citations62
US11210225B2Dec 28, 2021

Pre-fetch for memory sub-system with cache where the pre-fetch does not send data and response signal to host

MICRON TECHNOLOGY INC1 citations62
US11106609B2Aug 31, 2021

Priority scheduling in queues to access cache data in a memory sub-system

MICRON TECHNOLOGY INC0 citations62
US11086808B2Aug 10, 2021

Direct memory access (DMA) commands for noncontiguous source and destination memory addresses

MICRON TECHNOLOGY INC0 citations62
US10970222B2Apr 6, 2021

Eviction of a cache line based on a modification of a sector of the cache line

MICRON TECHNOLOGY INC0 citations62
US10908821B2Feb 2, 2021

Use of outstanding command queues for separate read-only cache and write-read cache in a memory sub-system

MICRON TECHNOLOGY INC0 citations62
US12236131B2Feb 25, 2025

Controller command scheduling in a memory system to increase command bus utilization

MICRON TECHNOLOGY INC0 citations61
US11983435B2May 14, 2024

Optimize information requests to a memory system

MICRON TECHNOLOGY INC0 citations61
US11740833B2Aug 29, 2023

Throttle response signals from a memory system

MICRON TECHNOLOGY INC0 citations61
US11650755B2May 16, 2023

Proactive return of write credits in a memory system

MICRON TECHNOLOGY INC0 citations61
US11573700B2Feb 7, 2023

Buffer management in memory systems for read and write requests

MICRON TECHNOLOGY INC1 citations61
US11023166B2Jun 1, 2021

Quality of service control for read operations in memory systems

MICRON TECHNOLOGY INC0 citations61
US11847058B2Dec 19, 2023

Using a second content-addressable memory to manage memory burst accesses in memory sub-systems

MICRON TECHNOLOGY INC0 citations60
US11442867B2Sep 13, 2022

Using a second content-addressable memory to manage memory burst accesses in memory sub-systems

MICRON TECHNOLOGY INC0 citations60
US11609855B2Mar 21, 2023

Bit masking valid sectors for write-back coalescing

MICRON TECHNOLOGY INC0 citations57
US11099987B2Aug 24, 2021

Bit masking valid sectors for write-back coalescing

MICRON TECHNOLOGY INC0 citations57
US11157412B2Oct 26, 2021

Read commands based on row status prediction

MICRON TECHNOLOGY INC0 citations52
US11809710B2Nov 7, 2023

Outstanding transaction monitoring for memory sub-systems

MICRON TECHNOLOGY INC0 citations51